Foundry 2.0 partnership with Open-Silicon and Amkor Technology yields successful 2.5D test vehicle project

Milpitas, Calif., November 21, 2013 – GLOBALFOUNDRIES today unveiled details of a project that demonstrates the value of its open and collaborative approach to delivering next-generation chip packaging technologies. The company, in partnership with Open-Silicon (chief architect) and Amkor Technology, Inc. (assembly and test), jointly exhibited a functional system-on-chip (SoC) solution featuring two 28nm logic chips, with embedded ARM processors, connected across a 2.5D silicon interposer. The jointly developed design is a test vehicle that showcases the benefits of 2.5D technology for mobile and low-power server applications and the viability of the Foundry 2.0 collaborative enablement model.

While some semiconductor manufacturers are approaching next-generation packaging technologies through internal development, GF is enabling an open supply chain through collaboration with ecosystem partners and customers. This approach allows GF’s customers to choose their preferred supply chain partners, while leveraging the experience of ecosystem partners who have developed deep expertise in design, assembly and test methodologies. When combined with GF’s leading-edge manufacturing capabilities, this open and collaborative model is expected to deliver lower overall cost and less risk in bringing 2.5D technologies to market.

“As the fabless-foundry business model evolves to address the realities of today’s dynamic market, foundries are taking on increasing responsibility for enabling the supply chain to deliver end-to-end solutions that meet the requirements of the broad range of leading-edge designs,” said David McCann, vice president of packaging R&D at GF. “To help address these challenges, we are driving our ‘Foundry 2.0’ collaborative supply chain model by engaging early with ecosystem partners like Open-Silicon and Amkor to jointly develop solutions that will enable the next wave of innovation in the industry.”

The test vehicle features two ARM Cortex-A9 processors manufactured using GF’s 28nm-SLP (Super Low Power) process technology. The processors are attached to a silicon interposer, which is built on a 65nm manufacturing flow with through-silicon-vias (TSVs) to enable high-bandwidth communication between the chips.

Open-Silicon provided the processor, interposer, substrate, and test design, as well as the test and characterization of the final product. GF provided the PDKs, interposer reference flow and manufactured both the 28nm ARM processors and the 65nm silicon interposer with embedded TSVs. Amkor provided the package-related design rules and manufacturing processes for back-side integration, copper pillar micro-bumping, and 2.5D product assembly. GF and Amkor collaborated closely throughout the project to develop and validate the design rules, assembly processes, and required material sets.

The companies demonstrated first-time functionality of the processor, interposer, and substrate designs, and the die-to-substrate (D2S) process used by the supply chain resulted in high yields. The design tools, process design kit (PDK), design rules, and supply chain are now in place and proven for 2.5D interposer products from GF, Amkor, and Open-Silicon.

“This project is a testament to the value of an open and collaborative approach to innovation, leveraging expertise from across the supply chain to demonstrate progress in bringing a critical enabling technology to market,” said Ron Huemoeller, senior vice president of advanced product development at Amkor Technology. “This collaborative model will offer chip designers a flexible approach to 2.5D SoC designs, while delivering cost savings, faster time-to-volume, and a reduction in the technical risk associated with developing new technologies.”

“We are pleased to be at the forefront of making 2.5D a reality with our foundry and OSAT partners,” said Dr. Shafy Eltoukhy, vice president of technology development at Open-Silicon. “This approach will allow designers to choose the right technology for each function of their SoC while simultaneously enabling finer grain and lower power connectivity than traditional packaging solutions along with reduced power budgets for next-generation electronic devices.”

ABOUT GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 160 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mainstream to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.globalfoundries.com.

Design features two 28nm ARM Cortex-A9 processors interfacing across a silicon interposer

Milpitas, Calif., November 21, 2013 — Open-Silicon, Inc., and GLOBALFOUNDRIES today announced the industry’s first demonstration of a functional system-on-chip (SoC) solution featuring two 28nm logic chips, with embedded ARM processors, connected across a 2.5D silicon interposer. The jointly developed design is a proof-of-concept vehicle to showcase the benefits of 2.5D technology for mobile and low-power server applications.

At the heart of the custom SoC are two ARM Cortex-A9 processors manufactured using GF’s 28nm-SLP (Super Low Power) process technology. The processors are attached to a silicon interposer, which is built on a 65nm manufacturing flow with through-silicon-vias (TSVs) to enable high-bandwidth communication between the chips. This approach allows designers to choose the most appropriate process technology for each function of their SoC, while the interposer and TSVs allow for finer grain and lower power connectivity than traditional packaging solutions, leading to smaller form factors and reduced power budgets for next-generation electronic devices.

The companies recently demonstrated the functioning SoC at ARM TechCon in Santa Clara, CA, where they were awarded “Best in Show” in the Chip Design category.

“We are now much closer to building a system in package than before and Open-Silicon is extremely pleased to be at the forefront of making 2.5D a reality with our foundry and OSAT partners,” said Dr. Shafy Eltoukhy, vice president of technology development at Open-Silicon. “Given the multitudes of advantages that this technology offers, we firmly believe that widespread adoption along with heterogeneous die-integration will ensue soon.”

“As chip designers face growing complexity and cost at smaller geometries, the adoption of 2.5D technology is increasingly being viewed as an alternative to traditional scaling at the transistor level,” said Srinivas Nori, director of SoC innovation at GF. “By collaborating closely with design partners like Open-Silicon and OSAT partners like Amkor, we will be able to accelerate the availability of this technology while minimizing cost, improving yield, maximizing re-use, and decreasing risk.”

Open-Silicon and GF developed the custom SoC to help overcome some of the challenges associated with bringing 2.5D technology to market. The 2.5D system features the following characteristics:

• Logic die including dual-core ARM Cortex-A9 CPUs, as well as DDR3, USB and AXI bridge interfaces
• A special EDA reference flow designed to address the additional requirements of 2.5D design, including top-level interposer design creation and floor planning, as well as the increased complexity of using TSVs, front-side and back-side bumps, and redistribution layer (RDL) routing
• Support for additional verification steps brought on by 2.5D design rules
• Custom die-to-die IO for better area and power characteristics providing a maximum of 8GB/s full-duplex data-rate across the two die through the silicon interposer
• A development board with memory, boot-ROM, and basic peripherals to demonstrate the die-to-die interface functionality through software running on the CPUs embedded in the logic dies
• A test methodology consisting of Boundary Scan and Loopback modes
• Package-related design rules, back-side integration, copper pillar micro-bumping, and 2.5D product assembly by Amkor Technology, a leading supplier of outsourced semiconductor packaging and test services

About Open-Silicon

Open-Silicon, a leading supplier and developer of customer-specific products (CSPs), provides ASICs, platforms, concept-to-parts development, customized IP, low-effort derivative design, and state-of-the-art manufacturing solutions. With Open-Silicon, customer’s benefit from global engineering including an ARM® Technology Center of Excellence, advanced SerDes integration, 2.5D interposer-based package engineering, experienced architects, leading-edge physical design methodology, and embedded software development, all leveraging the industry’s best technology from both Open-Silicon and the open market. For more information, visit Open-Silicon’s website at www.open-silicon.com or call 408-240-5700 begin_of_the_skype_highlighting 408-240-5700 FREE end_of_the_skype_highlighting.

About GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 160 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mainstream to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.globalfoundries.com.

A Significant Milestone of the Leading Foundry’s Strategic Growth in China to Build A Closer Partner and Customer Relationship

Shanghai, China, September 6, 2013 — GLOBALFOUNDRIES today announced the official opening of its new China office in Shanghai to enhance its presence in the fastest growing market and to strengthen its commitment to better serve China-based customers and the industry.

Given the importance of the China market, the Shanghai-based GF team will focus on providing global manufacturing support and on-the-ground technical and business services to all Chinese customers, as well as offering market-specific solutions for key application sectors in mobility, display, consumers, automotive and power management.

CEO of GF, Ajit Manocha said: “We established a sales office in Shanghai years ago to support our local customers. Over the years, our customers have grown rapidly in their business and advanced quickly into the leading-edge technology. They need, more than ever, a foundry partner who can provide an efficient and sophisticated level of sales and support coverage. We believe it’s the right time to strengthen our commitment to China by launching our first China subsidiary in Shanghai.”

“Having a new office and a stronger team allows us to have the flexibility of growing with our customers and partners, as we continue to provide a collaborative business model to help them succeed in this fast changing and competitive market,” Manocha added.

According to ‘China’s Impact on the Semiconductor Industry 2012 Update,’ a report issued by PwC in March 2013, China semiconductor industry grew by 14.4% in 2011 to reach a record $43.5 billion – growing more than ten times faster than the total worldwide semiconductor industry. A significant portion of that growth was attributed to China’s IC design or fabless sector which grew by more than 36% in 2011. In the meantime, China semiconductor consumption market grew by 14.6% to reach a record 47% of the global market. The report also anticipated that China would present a steady increase in market share of global semiconductor industry over the next five years.

“Everyone in the China team is excited to witness this milestone in GF’s history and is proud to be part of it,” said Joe Chen, Sales Vice President of GF for Greater China. “Building the strategic business relationship with an increasing number of Chinese customers, we are confident that the new office will enhance our capabilities of providing closer and effective local support, boosting our China business in the coming years.”

The partnership with ASIC service providers will continuously be enhanced to strengthen GF’s local capabilities in China. The foundry recently announced that it is working with Fuzhou-based Rockchip Electronics to ramp production for the customer’s RK3188 and RK3168 chips based on the foundry’s 28nm High-K Metal Gate process technology.

ABOUT GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 160 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mainstream to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.globalfoundries.com.

National collaboration announced to build a more robust US supply chain and build the nation’s manufacturing base

New York City, NY, August 20th, 2013 — GLOBALFOUNDRIES and five partners today announced their Clinton Global Initiative (CGI) Commitment to Action, a collaborative effort that has the potential to strengthen the US supply chain and build the manufacturing base. The commitment, which was the outgrowth of discussions during the 2012 CGI America meeting in Chicago, now moves from the developmental to implementation stage.

The NSNI is being lead and facilitated by GF and brings together representatives from the University of Michigan, Battelle and others in a collaborative partnership with the AutoHarvest Foundation, CONNECT, the CONNECTORY, the Hudson Valley Technology Development Center (HVTDC) and the Center for Economic Growth (CEG) to create a regional pilot in the Hudson Valley of NY (“Tech Valley”) that is intended to better connect the supply chain. Key components of the NSNI include helping small and midsized manufacturers get connected to large manufacturers as suppliers, improve access to innovation and to generally help provide direction when it comes to needed assistance through the use of an online network and leveraging the expertise of existing organizations. The overall goal is to create a scalable model, ultimately providing a tool to build a more robust US supply chain and grow the US manufacturing base.

“As it becomes more evident that the success of modern manufacturing will be an integral part of the growth of the U.S. economy, it is apparent that a strong linkage between all size manufactures and access to innovation is imperative to ensure that the U.S. manufacturing sector can compete and lead in the global economy,” said Mike Russo, senior manager, government relations, GF. “Large manufacturers need to be able to easily identify smaller manufacturers who are able to supply needed goods and smaller manufacturers need to know where their potential markets lie and have access to the latest innovation in order to improve manufacturing processes and product design. CGI has provided the vehicle for those now engaged in the NSNI to come together to identify and solve this fundamental problem.”

“The NSNI is intended to develop a comprehensive method to connect the supply chain,” said Sridhar Kota, University of Michigan. “Much of the needed information and resources exist, but there is no easy way for especially small and mid-sized manufacturers to access it. Better connectivity could provide manufacturers the necessary access to resources ranging from IP, expertise, and software tools to test facilities products, parts and capital. A state-of-the-art online network that leverages existing networks and resources will create the needed connectivity, leveraging existing expertise and information.”

“This CGI Commitment to Action, which strives to improve the American economy by invigorating the manufacturing value chain, aligns well with our inclusive intellectual property ecosystem that utilizes social media tools to smart-connect R&D and manufacturing innovators and commercializers to accelerate the adoption of innovation”, said AutoHarvest President and CEO, Jayson D. Pankin.

The process entails developing a scalable model by initially focusing on three geographic regions (the West, Mid-west and East). The CONNECTORY and CONNECT have a presence in California and the Pacific Northwest, the AutoHarvest Foundation in Michigan and the HVTDC/CEG are located in the nation’s new “Tech Valley”. The initial pilot will utilize the HVTDC and their existing platform in conjunction with the Capital Region MEP (led by the Center for Economic Growth) to develop a scalable framework and prototype web-based platform leveraging expertise of the others involved. Several other markets across the nation have expressed an interest to be involved as early pilots.

Regional economic development entities in other markets will be responsible for outreach and facilitation throughout the nation as the initiative is scaled, using the Hudson Valley model. This process will be conducive to scaling because it utilizes the existing grass roots, regional structure to facilitate…giving municipalities and economic development entities the tools necessary to understand the system, working with manufacturers/suppliers and to provide data to update the system in real time (through the use of templates), which helps to maintain the site and database.

While the initial focus of the NSNI is to connect all sized manufacturers in the supply chain in order to grow their markets and to provide better access to both product and process innovation, through better connectivity/sharing of best practices and leveraging existing platforms, the broader goal will be to help address the other top issues identified by manufacturers, including access to capital/financing; assistance in developing sustainability/environmentally friendly operations, access to design enablement and general business assistance to address issues inhibiting business growth.

About the Clinton Global Initiative

Established in 2005 by President Bill Clinton, the Clinton Global Initiative (CGI), an initiative of Bill, Hillary & Chelsea Clinton Foundation, convenes global leaders to create and implement innovative solutions to the world’s most pressing challenges. CGI Annual Meetings have brought together more than 150 heads of state, 20 Nobel Prize laureates, and hundreds of leading CEOs, heads of foundations and NGOs, major philanthropists, and members of the media. To date CGI members have made more than 2,300 commitments, which are already improving the lives of more than 400 million people in over 180 countries. When fully funded and implemented, these commitments will be valued at $73.5 billion. For more information, visit clintonglobalinitiative.org and follow us on Twitter @ClintonGlobal and Facebook at facebook.com/clintonglobalinitiative.

ABOUT GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 160 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mainstream to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.globalfoundries.com.

ABOUT AutoHarvest

AutoHarvest Foundation is a Michigan 501 (c) 3 non-profit organization – led by some of the most highly respected figures in the automotive industry. AutoHarvest is designing and launching a marketplace-driven e-collaboration system that accelerates innovation in advanced manufacturing. AutoHarvest is guided by its peer interest group, which consists of over 170 prominent government, university, automaker, supplier, venture capital, business accelerator and manufacturing organizations. Located within the innovation hubs of the Southeast Michigan region including Wayne State University’s Research and Development Park TechTown – and the University of Michigan’s North Campus Research Complex, AutoHarvest sits in the heart of NAFTA’s automotive cluster. Recently awarded a grant by the New Economy Initiative Foundation (“NEI”), AutoHarvest is part of the Detroit Regional Innovation Network. For more information visit: https://www.autoharvest.org.

ABOUT CONNECT

CONNECT has assisted in the formation and development of more than 3,000 companies in the San Diego region and is widely regarded as one of the world’s most successful organizations linking inventors and entrepreneurs with the resources they need for commercialization of innovative products in high tech and life sciences. The program has been modeled in more than 50 regions around the world. CONNECT has been recognized by Inc., Time and Entrepreneur magazines and in 2011 won the national State Science and Technology Institute’s 2011 Excellence in Tech Based Economic Development Award for Building Entrepreneurial Capacity. In 2010 CONNECT was the recipient of the Innovation in Economic Development Award from the U.S. Department of Commerce for creation of Regional Innovation Clusters. CONNECT manages the San Diego, Imperial Valley, Inland SoCal Innovation Hub (iHub) designated by the state of California Governor’s Office of Business & Economic Development in 2010. Key to our success has been the unique “culture of collaboration” between research organizations, capital sources, professional service providers and the established industries. For information on CONNECT or its programs, contact us at (858) 964-1300 begin_of_the_skype_highlighting (858) 964-1300 FREE end_of_the_skype_highlighting or visit connect.org

ABOUT THE CONNECTORY

Connectory.com® — the award-winning buyer-supplier resource that contains more than 22,000 detailed capabilities profiles of companies across all industries at every level of the supply chain including Manufacturing, Technology/R&D, Technical Services, Industrial Suppliers, Construction and the Trades, and Raw Materials (Agribusiness and Mining/ Quarrying). Connectory is fully keyword searchable with company locations mapped in a linked GIS API. Connectory is the supply chain database partner with CONNECT on their Nearsourcing Initiative aimed at effectively linking innovators to local providers of manufacturing and technical services. Connectory is a project of the East County Economic Development Council. For more information visit: connectory.com.

ABOUT THE HVTDC

Founded in 1988, the Hudson Valley Technology Development Center, Inc. (HVTDC) is a non-profit organization and one of ten regional technology development centers funded cooperatively through the Empire State Development’s Division of Science, Technology and Innovation, which works to facilitate the integration of innovation and technology throughout New York’s economic development efforts and the National Institute of Standards & Technology (NIST). HVTDC partners with their clients by delivering cost effective business solutions that help achieve sustained growth, optimize profits, identify competitive advantages and realize a high level of corporate social responsibility. The HVTDC experienced staff includes electrical, mechanical, computer and industrial engineers and project managers who have in-depth experience in business management, new product design and development, database and web development, production operations, business process analysis/improvement, grant writing and administration, management policy analysis, workforce training/development, strategic planning, organizational design, management policy and industrial engineering.

ABOUT CEG

Since 1987, the Center for Economic Growth (CEG) has been committed to fostering visionary economic growth throughout the 11-county Capital Region, as well as a significant portion of the Tech Valley corridor. As a private, not-for-profit organization we work with a diverse group of members and partners to advance the ability of the region and its assets to succeed in the global marketplace. With a focused and strategic approach we work to: GROW local companies by offering tactical business development strategies and services; ATTRACT opportunities for technology investment and expansion throughout Tech Valley and PREPARE communities to achieve their desired economic growth while enhancing the region’s excellent quality of life. In addition to support from its dedicated members, CEG receives funding and resources from Empire State Development’s Division of Science, Technology and Innovation, which works to facilitate the integration of innovation and technology throughout New York’s economic development efforts, the National Institute of Standards and Technology (NIST) / Manufacturing Extension Partnership (MEP) and National Grid. www.ceg.org

New ARM POP technology provides core-hardening acceleration for Cortex-A12 and Cortex-A7 processors

Milpitas, Calif., and Cambridge, UK, June 3, 2013 – In conjunction with the launch of the ARM® Cortex®-A12 processor, ARM and GlobalFoundries today announced new power, performance and cost-optimized POP™ technology offerings for the ARM Cortex-A12 and Cortex-A7 processors for GF 28nm-SLP High-K Metal Gate (HKMG) process technology. The Cortex-A12 processor was introduced by ARM today as part of a suite of IP targeting the rapidly growing market for mid-range mobile devices.

The companies will combine ARM’s next-generation mobile processor and POP IP with GF 28nm-SLP HKMG process solution, enabling a new level of system performance and power efficiency with the optimum economics necessary to serve the mid-range mobile device market. The new initiative builds on the existing robust ARM Artisan® physical IP platform and POP IP for the Cortex-A9 processor already available on GF 28nm-SLP, signifying another milestone in the multi-year collaboration between ARM and GF.

Central to this increase in functionality for mid-range mobile devices is the new ARM Cortex-A12 processor. The Cortex-A12 processor provides a 40 percent performance uplift and direct upgrade path from the incredibly successful Cortex-A9 processor while matching the energy efficiency of its predecessor. The Cortex-A12 processor provides best-in-class efficiency as a standalone solution, but additionally supports the innovative big. LITTLE™ processing technology with the Cortex-A7 processor, bringing this energy-efficient technology to the mid-range. GF 28nm-SLP process technology and associated ARM POP IP for the Cortex-A12 processor enables up to 70 percent higher performance (measured single-thread performance) and up to 2x better power efficiency in comparison to a Cortex-A9 processor using 40nm process technology. Designers can achieve even higher performance by trading off for lower power efficiency, depending on their application needs.

The newest POP technology enables customers to accelerate core-hardening of Cortex-A12 and Cortex-A7 processors on GF 28nm-SLP HKMG process. POP IP for Cortex processors has successfully enabled ARM-based SoCs with more than 30 different licenses since being introduced over three years ago. POP IP is composed of three elements necessary to achieve an optimized ARM processor implementation: core-specific tuned Artisan physical IP logic libraries and memory instances, comprehensive benchmarking reports, and implementation knowledge that detail the methodology used to achieve the result, to enable the end customer to achieve the same implementation quickly and at low risk.

“With 580 million mid-range smartphones and tablets forecast to be sold in 2015, consumers are increasingly looking for the right combination of performance, low power and cost effectiveness,” said Dr. Dipesh Patel, executive vice president and general manager, Physical IP Division at ARM. “With the Cortex-A12 processor and suite of IP announced today, ARM is delivering an optimized system solution leveraging the most innovative technologies available for this market. The POP IP solution on GF 28nm-SLP helps designers balance the performance, power and cost tradeoffs to achieve their targets for this growing market.”

GF 28nm-SLP technology is ideally suited for the next generation of smart mobile devices, enabling designs with faster processing speeds, smaller feature sizes, lower standby power and longer battery life. The technology is based on GF’s “Gate First” approach to High-K Metal Gate (HKMG), which has been in volume production for more than two years. The technology offers a combination of performance, power efficiency and cost that is ideally suited for the mid-range mobile market.

“GF is committed to a deep relationship with ARM to enable best-in-class solutions for our mutual customers. Our collaboration on the ARM Cortex-A12 processor implementation is a direct result of this focus and collaboration,” said Mike Noonen, executive vice president of Marketing, Sales, Design and Quality at GF.

GF’s next-generation 14nm-XM FinFET technology is expected to bring another dimension of enhanced power, performance and area for ARM mobile processors. A Cortex-A9 processor implemented on 14nm-XM technology, using 9-track libraries, is projected to enable a greater than 60 percent increase in frequency at constant power, or a decrease of more than 60 percent in power consumption at constant performance, when compared to implementation on 28nm-SLP technology using 12-track libraries. Similar results are expected for Cortex-A12 processor implementations. Click here for more details on GF’s 14nm-XM FinFet technology.

For further discussions about GF process technologies or ARM IP offerings please visit the companies’ respective exhibits at the Design Automation Conference (DAC), June 3-5, 2013 in Austin, Texas. ARM is located in booth 931, and GF can be found at booth 1314.

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About ARM

ARM designs the technology that is at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM’s comprehensive product offering includes RISC microprocessors, graphics processors, video engines, enabling software, cell libraries, embedded memories, high-speed connectivity products, peripherals and development tools. Combined with comprehensive design services, training, support and maintenance, and the company’s broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies. Find out more about ARM by following these links:

The secrets of success from the Connected Community surrounding ARM

ARM website: https://www.arm.com
ARM Connected Community®: https://www.arm.com/community
ARM Blogs: https://blogs.arm.com
ARMFlix on YouTube: https://www.youtube.com/armflix

ARM on Twitter:

https://twitter.com/ARMPROffice
https://twitter.com/ARMMultimedia
https://twitter.com/ARMMobile
https://twitter.com/ARMCommunity
https://twitter.com/ARMEmbedded
https://twitter.com/ARMSoC
https://twitter.com/ARMTools
https://twitter.com/SoftwareOnARM

ABOUT GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 160 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mid-range to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.gf.com.

Jointly developed with leading EDA providers, flows address AMS challenges from specification to verification; complete flows for digital design for double patterning

Milpitas, Calif. — May 30, 2013 — At next week’s 50th Design Automation Conference (DAC) in Austin, Texas, GLOBALFOUNDRIES will unveil a comprehensive set of certified design flows to support its most advanced manufacturing processes. The flows, jointly developed with the leading EDA providers, offer robust support for implementing designs in the company’s 20nm low power process and its leading-edge 14nm-XM FinFET process. Working closely with Cadence Design Systems, Mentor Graphics and Synopsys, GF has developed the flows to address the most pressing design challenges, including support for analog/mixed signal (AMS) design, and advanced digital designs, both with demonstration of the impact of double patterning on the flow.

The GF design flows work with its process design kits (PDKs) to provide real examples that demonstrate the entire flow. The user can download the design database, the PDK, detailed documentation and multi-vendor scripts to learn how to set up and use the GF design flow. The flows use open source examples and provide the customer with working, executable and customizable flows.

“As the developer of the industry’s first modular 14nm FinFET technology and one of the leaders at 20nm, we understand that enabling designs at these advanced process nodes requires innovative methodologies to address unprecedented challenges,” said Andy Brotman, vice president of design infrastructure at GF. “By working with a new level of collaboration with EDA partners, we can provide enhanced insight into our manufacturing processes in order to fully leverage the capabilities of 20nm and 14nm manufacturing. This provides our mutual customers with the most efficient, productive and risk-reduced approach to achieving working silicon.”

Production Ready AMS flow from specification to verification

To address the unique requirements of analog/mixed signal (AMS) design at advanced processes, GF has enhanced its design flows to provide production quality scripts and packaged methodologies. The new reference flow establishes a working flow from specification to physical verification that has been taped out to be verified on working silicon.

The AMS reference flow provides comprehensive double pattern design guidelines. It gives overview of decomposition flow for both block level and chip level. The flow also addresses decomposition for different design styles. Recommendations for color balancing, hierarchical decomposition, ECO changes are discussed. The flows also present decomposition impact on DRC run time and resulted database size.

Notably, the reference flow includes support for efficiency and productivity improvements in the Cadence Virtuoso® environment specifically for designing in a double patterned process. The flow includes support for Virtuoso Advanced Node 12.1 and provides efficient access to the tool’s productivity benefits for physical design with real-time, color-aware layout. Circuit designers can assign “same net” constraints in the schematic, and the layout designers can meet these requirements as they create the physical view. Additionally, layout designers can take advantage of Virtuoso tool support for local interconnect, and advanced layout dependent effect management.

The flow also features interoperability with Mentor’s Calibre® nmDRC™, nmLVS™, and extraction products which address multipatterning requirements for both double and triple patterning. In addition special settings for analog design; auto-stitching and when to use it; and fill and color balancing are described in detail.

The AMS flow provides detailed information on parasitic extraction and layout dependent effects, both of which introduce new challenges at 20nm and 14nm. For parasitic extraction, the flows are described in detail and customizable scripts and examples demonstrate OA and DSPF back annotation. In addition the flows illustrate methodologies to predict layout-dependent effects during schematic design and methods to include full models in post layout extraction. PEX flows for Synopsys StarRC™ extraction, Cadence QRC and Mentor CalibrexRC™ are supported.

These flows serve as references to validate the correctness of the accompanying PDK as well as the vendor tools setup.

Sign-off ready RTL2GDSII flows that address double patterning

GF is also making available new flows that support a complete RTL-to-GDSII design methodology for targeting its 20nm and 14nm manufacturing processes. The company worked with EDA vendors to certify the flows in their respective environments and provide a platform for optimized, technology-aware methodologies that take full advantage of the performance, power and area benefits of the processes.

The result is a set of fully executable flows containing all the scripts and template files required to develop an efficient methodology. The flows serve as a reference to validate the correctness of the accompanying PDK as well as the vendor tool setup. In addition the flows offer access to other critical and useful information, such as methodology tutorial papers; guidelines and methodologies for decomposition of double patterned layouts; PEX/STA methodology recommendations and scripts; and design guidelines and margin recommendations.

A critical aspect of manufacturing at this level is the use of double patterning, an increasingly necessary technique in the lithographic process at advanced nodes. Double patterning extends the ability to use current optical lithography systems and the GF flows provide comprehensive double pattern design guidelines. They address design for double patterning and the added flow steps for different design styles and scenarios.

This includes support for odd cycle checking, a new type of DRC rule that must be met to allow for legal decomposition of the metals into two colors. This check is detailed in the flow and guidelines are provided to make sure it is met.

Synopsys and GF worked together to minimize the impact of changes associated with the 3-D nature of FinFET devices as compared to planar transistors. The two companies focused on making FinFET adoption transparent to the design team. The collaboration on Synopsys’ RTL to GDSII flow includes 3-D parasitic extraction with the Synopsys StarRC™ tool, SPICE modeling with the Synopsys HSPICE® product, routing rules development with the Synopsys IC Compiler™ tool and static timing analysis with the Synopsys PrimeTime® tool.

Cadence contributed a complete RTL-GDSII flow, including physical synthesis, and planning and routing developed with the Encounter® Digital Implementation (EDI) System foundation flow. The seamless implementation flow, using Cadence Encounter RTL Compiler and EDI System, supports double patterning and advanced 20- and 14-nm routing rules.

Mentor’s Olympus-SoC™ place and route system is supported in the flow, providing support for new DRC, double patterning, and DFM rules. The Olympus-SoC router has its own native coloring engine along with verification and conflict resolution engines that detect and automatically fix double patterning violations. Expanded features include DP-aware pattern matching, coloring aware pin access, pre-coloring of critical nets, and DP aware placement. The Calibre® InRoute™ product allows Olympus-SoC customers to natively invoke Calibre signoff engines during design for efficient and faster manufacturing closure.

Double patterning also impacts LVS and other DRC issues, and the flows provide methodology details to address these areas, including hierarchical decomposition to reduce data base explosion. Parasitic extraction methodologies and scripts are provided as well, offering ways to address double patterning-induced variations via DPT corners or with maskshift PEX features.

About GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 160 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mainstream to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.globalfoundries.com.

Collaboration with leading EDA vendors supports complete range of steps required to create and verify advanced stacking implementations using TSV and interposer approaches

Milpitas, Calif. — May 30, 2013 — At next week’s 50th Design Automation Conference (DAC) in Austin, Texas,GLOBALFOUNDRIES will unveil a comprehensive set of certified design flows to support 2.5D IC product development with its most advanced manufacturing processes. The sign-off ready flows, jointly developed with the leading EDA providers, offer robust support for implementing designs using sophisticated multi-die packaging techniques, leveraging through-silicon vias (TSVs) in 2.5D silicon interposers and new bonding approaches.

Multi-vendor support is available, with full implementation flows from Synopsys and Cadence Design Systems. Physical verification with Mentor Graphics’ suite of tools is included in the flow.

The GF 2.5D technology addresses the challenges of multi-die integration with solutions for front-end steps such as via-middle TSV creation, and flexibility for the backend steps, like bonding/debonding, grinding, assembly, and metrology.

“Our 2.5D technology provides designers with a path to enable heterogeneous logic and logic/memory integration, offering increased performance and reduced power consumption, without the need for additional packages,” said Andy Brotman, vice president of design infrastructure at GF. “These benefits can now be realized very efficiently with certified design flows that provide support for the additional steps and design rules involved in the design process. By working closely with our EDA partners, we can greatly reduce the development time and time-to-production using the most advanced multi-die approaches.”

The flows allow designer to quickly and reliably address the additional requirements of 2.5D design, including top-level interposer design creation and floor planning, as well as the increased complexity of using TSVs, front-side and back-side bumps, and redistribution layer (RDL) routing. The flows support the need for additional verification steps brought on by 2.5D design rules.

The design flows work with GF’s process design kits (PDKs) to provide real examples that demonstrate the entire flow. The user can download the design database, the PDK, detailed documentation and multi-vendor scripts to learn how to set up and use the GF design flow. The flows use open source examples and provide the customer with working, executable and customizable flows.

The flows come with a CPU core and memory IP and all the scripts and settings to execute a Synopsys Galaxy™ Implementation Platform-based flow or Cadence Encounter®-based implementation flows with the GF PDK. Similarly, the Mentor Calibre® 3DSTACK tool is exercised in the flow to verify DRC, LVS and extraction within and between the various die stacks leveraging the same golden design kits as used inside of GF.

Comprehensive design support

The flows provide support for a complete 2.5D design flow. This includes RDL routing between chips on interposer and RDL routing to IO pads. The flows demonstrate all the steps involved in chip pad setup, C4 and microbump placement, and TSV alignment. Designers can use the flows to be guided through processes such as creating top die (logic and memory) with microbumps, followed by interposer creation – including floor planning, microbump, TSV and C4 Bump placement, power mesh generation and signal routing.

The flow incorporates the Cadence 3D-IC solution, which supports all three driving design methodologies: package driven, SoC driven, and custom driven. The solution has been proven on a number of designs ranging from 2.5D to full 3D. All of the requisite technology features are supported and accessible across environments to help unify the design, analysis and signoff tasks on the multiple die and substrate. The Cadence 3D-IC solution includes the Encounter Digital Implementation System with a 3D option.

The Synopsys Galaxy Implementation Platform has been enhanced specifically to address 2.5D design. Designers can implement the Synopsys IC Compiler™ tool for placement, assignment and routing of microbump, TSV, probe-pad and C4; microbump alignment checks; RDL and signal routing, and power mesh creation on silicon interposer interconnection layers. Advanced verification and analysis support is also available for layout vs. schematic (LVS) connectivity and design rule checking (DRC) between stacked die; parasitic extraction for TSV, microbump, RDL; signal routing metal for stacked die and silicon interposer design interconnection; and timing analysis of multi-die systems.

The flows allow for interposer and top-die physical/logical interface and alignment checks at various stages in the design phase. Mentor’s Calibre can be used to verify physical offset, rotation, and scaling at die interfaces. The Calibre 3DSTACK product also enables connectivity tracing and extraction of interface parasitic elements needed for multi-die performance simulation.

• Galaxy Implementation Platform

About GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 160 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mainstream to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.globalfoundries.com.

STT-MRAM offers enhanced performance and scalability for embedded and standalone applications

Leuven (Belgium) — May 21, 2013 — Imec and GLOBALFOUNDRIES announced today that they have expanded joint development efforts to advance STT-MRAM (spin-transfer torque magnetoresistive random access memory) technology.

The first IC manufacturer to join imec’s R&D program on emerging memory technologies, GF completes the value chain of imec’s research platform, which fuels industry collaboration from technology up to the system level. GF is joining a team with a leading fabless company (https://www2.imec.be/be_en/press/imec-news/qualcomm2013.html) and several worldwide equipment suppliers providing the complete infrastructure necessary for R&D on STT-MRAM.

STT-MRAM technology is a promising high-density alternative to existing memory technologies, like SRAM and DRAM. Together, imec and the program members aim to explore the potential of STT-MRAM, including performance below 1nanosecond (ns) and scalability beyond 10 nanometers (nm) for embedded and standalone applications.

“We are elated to intensify our collaboration with GF and the other program members on advanced memory technologies—a true testament to the value we offer our industrial partners,” stated Luc Van den hove, president and CEO at imec. “Our unique research environment harnesses the collective expertise and knowledge of the entire value chain, bringing together foundries, IDMs, fabless and fablite companies, packaging and assembly companies, and equipment and material suppliers to drive innovation and the development of new, competitive products.”

“Innovation in next-generation memory is required to give chip designers new options to continue to deliver leading-edge products with higher performance, lower power-consumption, and better bandwidth,” said GF chief technology officer Gregg Bartlett. “This new partnership with imec will enable close collaboration with customers, partners, and the supplier community to help reduce the risk in bringing this new memory technology to market.”

About imec

Imec performs world-leading research in nanoelectronics. Imec leverages its scientific knowledge with the innovative power of its global partnerships in ICT, healthcare and energy. Imec delivers industry-relevant technology solutions. In a unique high-tech environment, its international top talent is committed to providing the building blocks for a better life in a sustainable society. Imec is headquartered in Leuven, Belgium, and has offices in Belgium, the Netherlands, Taiwan, US, China, India and Japan. Its staff of close to 2,000 people includes more than 600 industrial residents and guest researchers. In 2011, imec’s revenue (P&L) was about 300 million euro. Further information on imec can be found at www.imec.be.

Imec is a registered trademark for the activities of IMEC International (a legal entity set up under Belgian law as a “stichting van openbaar nut”), imec Belgium (IMEC vzw supported by the Flemish Government), imec the Netherlands (Stichting IMEC Nederland, part of Holst Centre which is supported by the Dutch Government), imec Taiwan (IMEC Taiwan Co.) and imec China (IMEC Microelectronics (Shangai) Co. Ltd.) and imec India (Imec India Private Limited).

About GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 160 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mainstream to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.globalfoundries.com.

Contact:

Hanne Degans, External Communications Officer, T: +32 16 28 17 69, Mobile: +32 486 065 175 begin_of_the_skype_highlighting +32 486 065 175 FREE end_of_the_skype_highlighting, [email protected]

Singapore, May 6, 2013 — KC Ang, Senior Vice President and General Manager of GLOBALFOUNDRIES Singapore, has been appointed to serve SEMI Singapore Regional Advisory Board (RAB) as their new chairman effective immediately.

A semiconductor industry veteran, Ang has held various senior leadership roles in GF, including recent positions at the company’s global manufacturing sites outside Singapore – Fab 1 in Germany and Fab 8 in the United States – to help accelerate the transformation of those sites into pure-play world class foundry operations.

Having worked in the industry for more than 25 years, Ang brings a wealth of foundry experience and expertise to SEMI Singapore RAB, an advisory group of industry executives chartered to drive SEMI’s mission in promoting growth and increasing visibility of the semiconductor industry in Southeast Asia.

“I am honored to be selected as the chairman of the SEMI Singapore RAB,” said Ang. “The semiconductor industry in this region has developed into a vibrant and robust ecosystem today, and Singapore with her rich semiconductor heritage plays a leading role in the contribution. I look forward to sharing our foundry’s global knowledge and working with my industry peers to further promote and enhance the industry footprint within Singapore and regionally.”

“On behalf of SEMI Singapore and its members, I am pleased to welcome KC Ang to the Board,” said Terry Tsao, president of SEMI Southeast Asia. “Alongside with other distinguished industry leaders who joined our Board as executive directors, I believe under the chairmanship of KC, the team will continue to spearhead activities that can help drive growth in the semiconductor industry for this region.”

ABOUT GF

GF is the world’s first full-service semiconductor foundry with a truly global footprint. Launched in March 2009, the company has quickly achieved scale as the second largest foundry in the world, providing a unique combination of advanced technology and manufacturing to more than 150 customers. With operations in Singapore, Germany and the United States, GF is the only foundry that offers the flexibility and security of manufacturing centers spanning three continents. The company’s three 300mm fabs and five 200mm fabs provide the full range of process technologies from mainstream to the leading edge. This global manufacturing footprint is supported by major facilities for research, development and design enablement located near hubs of semiconductor activity in the United States, Europe and Asia. GF is owned by the Advanced Technology Investment Company (ATIC). For more information, visit https://www.globalfoundries.com.

Media Contact:

Gina Wong
(65) 6670-8108
[email protected]

Lim Wei Lee
(65) 6670-1821
[email protected]