eFPGA Replaces Crystal Ball

By: Timothy Saxe

Most electrical engineers are familiar with FPGAs, and many have had experience using standalone FPGAs.  eFPGA (embedded FPGA) technology allows a semiconductor company to embed an FPGA in an SoC or ASIC.  The industry knows from bitter experience (40 defunct FPGA startups and counting) that programmable logic is not easy.  The main stumbling block for FPGA startups has been the design environment, not the silicon.  The simple fact is that the silicon is only as good as the tools that support it – they must be straightforward, robust, easy-to-use, and deliver excellent quality of results.  As if that were not challenging enough, eFPGA products also exist in the ASIC design environment which uses a different tool flow.  Thus a successful eFPGA must have an excellent silicon implementation, excellent ASIC tool support, and an excellent FPGA tool flow.  Fortunately there are major benefits to embedding FPGA: lower power, higher performance, lower cost, improved future proofing and design flexibility.

QuickLogic started life 29 years ago producing standalone FPGAs.  15 years ago we saw that the economics had changed to favor mixing ASIC cores with programmable logic, and we started down the road of developing embedded FPGA solutions.  At that time, various FPGA startups were trying to sell eFPGA technology, but there was no uptake.  The reason there was no uptake was economic: masks were cheap, ASIC gates were cheap and FPGA logic was expensive.  Roll the clock forward 15 years, and now things have changed: masks are expensive, ASIC gates are cheaper and FPGA logic is also cheaper.  Our latest device, the EOS™ S3 System-on-Chip (SoC) targets the smartphone, wearable, and hearable markets. These are very price sensitive and power sensitive products.  Fortunately the GLOBALFOUNDRIES 40nm cost structure allows us to meet the price requirements with a product that has enough eFPGA to be really useful.  This enabled us to have a cost effective product where the hardware can be adapted for different markets without incurring mask costs.  In addition, having eFPGA allows us to move critical tasks from software into hardware to save power, which is critical for power sensitive applications.

A small digression on the meaning of power sensitive: everyone claims to be power sensitive. To server designers using a 25Watt FPGA to offload a 90Watt CPU is being power sensitive.  In the wearable market where people want six months from a CR2450 battery the average system power must be 410uW, and in the IoT market where people want three years from two AA batteries, the average system power must be 318uW.  Our focus is on the wearable and IoT markets, where designers expect the compute unit to use only 25% of the system power: 100uW for wearables, and 80uW for IoT.

Since we operate in markets that require low power, we see GLOBAFOUNDRIES 22FDX® process as the workhorse of the future for power sensitive markets.  The economics are better, and dynamic back-bias should enable designers to reduce average system power by 25% to 50% compared to 40nm.  Particularly important to IoT, the eMRAM, coming soon to 22FDX, enables both single chip devices as well as ultra-low power sleep states more cost effectively than flash memory.

Why now? What has changed in the past 15 years?

First, the bets are getting bigger: the combination of mask costs and software costs have soared.  Second, markets are more fragmented, which means lower volumes per design.  Finally, future growth lies in IoT, which seems to mean a lot of different things.

Now if you have a crystal ball that accurately predicts the future, you can simply produce an ASIC that meets those needs.  But if you don’t, including a QuickLogic ArcticPro™ eFPGA block in your design will let you:

  • Update your hardware when standards update or evolve
  • Update your features when you discover new market needs
  • Create multiple product variants from a single mask set
  • Get to market more quickly, and stay in market longer by evolving product features

Over the years, we have found that this is the hardest point to grasp.  Talk to the ASIC team and they will tell you, correctly, to just tell them what you need and they can implement it better.  The disconnect is that they are not responsible for defining what is required.  Now you have another option.  Include a small block of eFPGA – you will find it surprisingly economical in 22FDX.  QuickLogic has been doing this for 15 years, so we understand what it takes for a successful integration – our methodology makes it no harder than adding any other hard macro.  We also understand what a production quality FPGA design flow looks like – we’ve been supplying them to the most quality and reliability-conscious markets in the world – aerospace, defense, and instrumentation & test markets for 30 years.  We understand really low power – we’ve been doing that for five years, and FD-SOI is the perfect complement to the ArcticPro architecture.  Finally, eco-system is vital to the diverse needs of IoT, and the GLOBAFOUNDRIES FDXcelerator™ brings together a diverse collection of proven IP, such as our ArcticPro eFPGA, that enables silicon architects to rapidly develop high value, low power systems-on-a-chip.

About Author

Timothy Saxe

Timothy Saxe
Senior VP of Engineering and CTO

Timothy Saxe (Ph.D) has served as our Senior Vice President and Chief Technology Officer since November 2008. In August 2016, he expanded the role to include Senior Vice President of Engineering. Mr. Saxe has been with QuickLogic since May 2001 and during the last 15 years has held a variety of executive leadership positions including Vice President of Engineering and Vice President of Software Engineering. Dr. Saxe was Vice President of FLASH Engineering at Actel Corporation, a semiconductor manufacturing company. Dr. Saxe joined GateField Corporation, a design verification tools and services company formerly known as Zycad, in June 1983 and was a founder of their semiconductor manufacturing division in 1993. Dr. Saxe became GateField’s Chief Executive Officer in February 1999 and served in that capacity until GateField was acquired by Actel in November 2000. Mr. Saxe holds a B.S.E.E. degree from North Carolina State University, and an M.S.E.E. degree and a Ph.D. in electrical engineering from Stanford University.

 

eFPGA,未来尽在掌握

作者: Timothy Saxe

几乎所有电子工程师都对FPGA熟悉,而其中一大部分甚至对独特的FPGA具备经验. eFPGA (嵌入式 FPGA)技术让半导体公司可以将FPGA嵌入到SoC或ASIC中.。行业曾从经验中获得沉痛的经验(至此已失败的FPGA初创公司已有40家,并且数量仍不断增加),认为编译性逻辑是很困难的。初创公司最大的难题来自于设计环境,而不是硅技术本身。事实上,硅只有在拥有对应支持工具时才可发挥优势–工具必须直接浅显、可靠并易于使用,还必须提供卓越的品质和结果。如果这些还不够具备挑战性,ASIC设计环境还需要一套完全不同的工具设计流程。所以,成功的嵌入式FPGA必须拥有卓越的硅实操性、卓越的ASIC工具支持和卓越的FPGA工具流程。幸运的是, 嵌入式FPGA拥有显著的优势: 低功耗、高性能、低成本、良好的发展性和设计灵活度。

QuickLogic 在29年前成立并制造独特的FPGA。15年前我们看到了ASIC核心与可编程逻辑的技术结合趋势,并开始在发展嵌入式FPGA设计的道路上前进。在当时,多家FPGA初创公司企图开发eFPGA技术,可是都没有将其实现。原因是在当时,此技术的实现不符合经济效益,掩膜十分廉价,ASIC逻辑门很便宜,而FPGA非常昂贵。15年后,事情发生了改变:掩膜非常昂贵,而ASIC逻辑门愈发廉价,而FPGA的成本也下降了。我们最新的设备, EOS™ S3 SoC 主要针对智能手机、穿戴式设备和声音市场。此类市场对于成本和功耗十分敏感。所幸格芯40nm成本结构让我们可以满足成本需求的同时拥有十分实用的eFPGA产品。 我们的产品可以避免掩膜花销,为不同市场做出调整。此外, eFPGA让我们将难题在硬件层次上解决,节省了功耗。

 

 

此处引入有关功耗敏感性的题外话: 每个人都声称自己的产品是对功耗十分敏感的。对于服务器设计者来说,使用25瓦特的FPGA来超载一块90瓦特的CPU就是功耗敏感。在穿戴式设备市场,人们希望一块CR2450电池可以支撑6个月,那系统平均功耗必须是410微瓦,而对于物联网市场,大家希望AA电池可以支持3年,那系统平均功耗必须是318微瓦。我们的焦点在可穿戴式和物联网市场,设计者可以期待计算单元只占系统25%的功耗:可穿戴式设备为100uW;物联网为80uW。

因为我们的操作主要在低功耗领域,我们认为格芯22FDX® 制程是未来功耗敏感市场的出路。与40nm制程对比, 22FDX® 经济效应更好,而且动态背极偏置将使设计者将系统平均功耗降低25%到50%。这对于物联网市场尤为重要,将要使用22FDX® 的eMRAM技术,将实现单芯片设备和超低功耗睡眠模式,比闪存内存成本效率更高。

为什么是现在?这过去的15年来发生了什么?

第一,投入更加大了:掩膜和软件成本已突破天际。 第二,市场分化更加严重了,意味着每个设计的产量将下降。最后,未来的物联网技术,看起来与各种不同的事物相关。

如果你手上有个水晶球,可准确预测未来,你可以直接制造符合所有要求的ASIC。可如果你没有水晶球,在你的设计中加入一个QuickLogic ArcticPro™ eFPGA模块,将使你可以:

  • 当标准变化时更新你的硬件
  • 当出现新的市场需求时更新产品的功能
  • 从同一组掩膜组合中制造出不同的产品
  • 更快进入市场,通过提升产品功能延续市场寿命

多年以来,我们发现这是最难把握的要点。与ASIC组联系,他们会让你直接告诉他们你的要求,他们将更好地实现。断层的原因是他们并不是定义需求的人。现在你有另一个选择。给自己的产品加入一个eFPGA模块,你会惊喜地发现,利用22FDX技术,这个模块非常经济。QuickLogic已有15年经验,我们了解成功的集成所需的要素,我们的方法让集成与加入其它硬件模块一样简单。我们也懂得高品质FPGA生产设计流程,我们已经对质量要求最高的航空市场、防御系统和工具及测试市场供应产品长达30年。我们懂得真正的低功耗,我们已经在此方向钻研5年,FDSOI是ArcticPro架构的完美补充。最后,生态系统对于物联网的多种需求是最重要的,而格芯的FDXcelerator™计划将多种经验证的IP,例如我们的ArcticPro,集中到了一起,让硅架构快速发展,成为高价值地功耗的芯片上系统。

格芯推出面向数据中心、机器学习和5G网络的7纳米专用集成电路平台

FX-7TM产品采用格芯7纳米FinFET工艺,提供业界一流的知识产权及解决方案

 

 

加利福尼亚,圣克拉拉(2017年6月14日)—— 格芯今日宣布推出其基于7纳米FinFET工艺技术的FX-7TM专用集成电路(ASIC)。FX-7是一个集成式设计平台,将先进的制造工艺技术与差异化的知识产权和2.5D/3D封装技术相结合,为数据中心、机器学习、汽车、有线通信和5G无线应用提供业内最完整的解决方案。

 

基于FX-14的持续成功,凭借业内领先的56G SerDes技术和专用集成电路专长,FX-7提供包括高速SerDes(60G, 112G)在内的全方位定制接口知识产权和差异化存储解决方案,涵盖低功耗SRAM、高性能嵌入式TCAM、集成式DACs/ADCs和ARM处理器,以及诸如2.5D/3D的先进封装选择。此外,FX-7产品组合可面向以超大型数据中心、5G网络、机器与深度学习应用为代表的低功耗和高性能应用,为其提供全新的设计方法和复杂的ASIC解决方案。未来,FX-7有望被运用于支持汽车ADAS及图像应用的解决方案。

 

格芯ASIC业务部高级副总裁Mike Cadigan 表示:“随着全球网络中数据流量和带宽的爆炸性增长,我们的客户不断提出新的需求。利用我们最先进的7LP FinFET工艺技术,FX-7产品能为面向诸如数据中心、深度计算、无线网络等新兴领域的客户,提供最先进的低功耗、高性能ASIC解决方案,从而不断提升我们为客户服务的领导者形象。”

 

“得益于格芯在硅芯片的制造专长与IBM前半导体技术业务的有力结合,格芯的7纳米FinFET工艺技术展示了其先进科技和市场领导地位,”TIRIAS Research 创始人兼首席分析师Jim McGregor,表示,“通过其最新FX-7 ASIC产品,格芯将业务版图从传统代工客户拓展至新一代系统公司,这些公司正寻求将前沿芯片工艺应用于从人工智能的深度学习到下一代5G网络等广泛领域。”

 

FX-7 ASIC产品设计套件现已就绪,预计在2019年实现量产。

 

###

 

 

关于格芯

 

格芯是全球领先的全方位服务半导体代工厂,为世界上最富有灵感的科技公司提供独一无二的设计、开发和制造服务。伴随着全球生产基地横跨三大洲的发展步伐,格芯促生了改变行业的技术和系统出现,并赋予了客户塑造市场的力量。格芯由阿布扎比穆巴达拉发展公司(Mubadala Development Company)所有。欲了解更多信息,请访问 https://www.globalfoundries.com

 

联系方式

 

Erica McGill

GF

(518) 795-4250

[email protected]

杨颖(Jessie Yang)

(021) 8029 6826

[email protected]

 

石燕 (Sherry Shi)

86 15900477699

[email protected]

 

 

格芯交付性能领先的7纳米FinFET技术在即

 与原有的14纳米FinFET相比,全新的7LP技术将提升40%的性能

 

 

加利福尼亚,圣克拉拉(2017年6月14日)—— 格芯今日宣布推出其具有7纳米领先性能的(7LP)FinFET半导体技术,其40%的跨越式性能提升将满足诸如高端移动处理器、云服务器和网络基础设施等应用的需求。设计套件现已就绪,基于7LP技术的第一批客户产品预计于2018年上半年推出,并将于2018年下半年实现量产。

 

2016年9月,格芯曾宣布将充分利用其在高性能芯片制造中无可比拟的技术积淀,来研发自己7纳米FinFET技术的计划。由于晶体管和工艺水平的进一步改进,7LP技术的表现远优于最初的性能目标。与先前基于14纳米FinFET技术的产品相比,预计面积将缩小一半,同时处理性能提升超过40%。目前,在格芯位于纽约萨拉托加县的全球领先的Fab 8晶圆厂内,该技术已经做好了为客户设计提供服务的准备。

 

格芯CMOS业务部高级副总裁Gregg Bartlett先生表示:“我们的7纳米FinFET技术正在按计划进行开发。我们看到,格芯在2018年计划出厂的多样化产品对客户有着强大吸引力。在推动7纳米芯片于未来一年中实现市场化的同时,格芯正在积极开发下一代5纳米及其后续的技术,以确保我们的客户能够在最前沿领域内获取世界级的技术蓝图。”

 

格芯还将持续投资下一代技术节点的研究与开发。通过与合作伙伴IBM和三星的密切合作,2015年格芯便宣布推出7纳米测试芯片。此后,格芯又于近日宣布业内首款基于硅纳米片晶体管的5纳米的样片。目前,格芯正在探索一系列新的晶体管架构,以帮助其客户迈进下一个互联的智能时代。

 

格芯的7纳米FinFET技术充分利用了其在14纳米FinFET技术上的批量制造经验,该技术于2016年初2月8日在Fab 8晶圆厂中开始生产。自那时起,格芯已为广泛的客户提供了“一次成功”的设计。

 

为了加快7LP的量产进程,格芯正在持续投资最新的工艺设备能力,包括在今年下半年首次购进两个超紫外光(EUV)光刻工具。7LP的初始量产提升将依托传统的光刻方式,当具备批量生产条件时,将迁移至EUV光刻技术。

 

引言:

 

我们很高兴看到格芯先进的7纳米工艺所带来的领先技术。AMD与格芯的合作集中于创造高性能的产品,从而带来更沉浸式和更直观的计算体验。”

 —— Mark Papermaster,AMD高级副总裁兼首席技术官

 

“虽然晶体管结构并非技术成功的唯一重要因素,但仍然承担着极其关键的作用。这是7纳米芯片批量生产历程中的重要里程碑,证明了格芯的工艺流程已经成熟到足以开始进行真正的客户产品设计。同时,该公司已经在向5纳米及更精细的芯片市场迈进。目前世界上能驾驭此种领先创新技术的公司屈指可数,格芯无疑是这个精英团队中的重要一员。”

—— Patrick Moorhead,Moor Insights & Strategy公司总裁兼首席分析师

 

“格芯不断展现了美国在前沿技术领域中的领先地位,如果能继续在7纳米芯片的研究中进步,格芯将成为第一个跨过该领域全部技术节点的公司。在过去,有很多人还没有走到格芯今天的这一步,便失败了。这是从摩尔定律中汲取价值而产生的一种全新战略方式,在艰难绕过10纳米领域后,格芯发力攻克7纳米领域。其他公司则是把资源分散,来进行半程或四分之一节点处的研发。”

—— Dan Hutcheson,VLSI Research公司总裁兼董事长

 

 

###

 

 

关于格芯

 

格芯是全球领先的全方位服务半导体代工厂,为世界上最富有灵感的科技公司提供独一无二的设计、开发和制造服务。伴随着全球生产基地横跨三大洲的发展步伐,格芯促生了改变行业的技术和系统出现,并赋予了客户塑造市场的力量。格芯由阿布扎比穆巴达拉发展公司(Mubadala Development Company)所有。欲了解更多信息,请访问 https://www.globalfoundries.com

 

 

联系方式

 

Erica McGill

GF

(518) 795-4250

[email protected]

杨颖(Jessie Yang)

(021) 8029 6826

[email protected]

 

石燕 (Sherry Shi)

86 15900477699

[email protected]

 

GLOBALFOUNDRIES on Track to Deliver Leading-Performance 7nm FinFET Technology

New 7LP technology offers 40 percent performance boost over 14nm FinFET 

Santa Clara, Calif., June 13, 2017 – GLOBALFOUNDRIES today announced the availability of its 7nm Leading-Performance (7LP) FinFET semiconductor technology, delivering a 40 percent generational performance boost to meet the needs of applications such as premium mobile processors, cloud servers and networking infrastructure. Design kits are available now, and the first customer products based on 7LP are expected to launch in the first half of 2018, with volume production ramping in the second half of 2018.

In September 2016, GF announced plans to develop its own 7nm FinFET technology leveraging the company’s unmatched heritage of manufacturing high-performance chips. Thanks to additional improvements at both the transistor and process levels, the 7LP technology is exceeding initial performance targets and expected to deliver greater than 40 percent more processing power and twice the area scaling than the previous 14nm FinFET technology. The technology is now ready for customer designs at the company’s leading-edge Fab 8 facility in Saratoga County, N.Y.

“Our 7nm FinFET technology development is on track and we are seeing strong customer traction, with multiple product tapeouts planned in 2018,” said Gregg Bartlett, senior vice president of the CMOS Business Unit at GF. “And, while driving to commercialize 7nm, we are actively developing next-generation technologies at 5nm and beyond to ensure our customers have access to a world-class roadmap at the leading edge.”

GF also continues to invest in research and development for next-generation technology nodes. In close collaboration with its partners IBM and Samsung, the company announced a 7nm test chip in 2015, followed by the recent announcement of the industry’s first demonstration of a functioning 5nm chip using silicon nanosheet transistors. GF is exploring a range of new transistor architectures to enable its customers to deliver the next era of connected intelligence.

GF’s 7nm FinFET technology leverages the company’s volume manufacturing experience with its 14nm FinFET technology, which began production in early 2016 at Fab 8. Since then, the company has delivered “first-time-right” designs for a broad range of customers.

To accelerate the 7LP production ramp, GF is investing in new process equipment capabilities, including the addition of the first two EUV lithography tools in the second half of this year. The initial production ramp of 7LP will be based on an optical lithography approach, with migration to EUV lithography when the technology is ready for volume manufacturing.

Supporting Quotes

“We are very pleased with the leading-edge technology that GF is bringing with its advanced 7nm process technology. Our collaborative work with GF is focused on creating high-performance products that will drive more immersive and instinctive computing experiences.”

Mark Papermaster, CTO and senior vice president of technology and engineering, AMD.

“IBM is committed to meeting the rising demands of cognitive systems and cloud computing. GF’s leading performance in 7LP process technology, reflecting our joint Research collaboration, will allow IBM Power and Mainframe systems to push beyond limitations to provide high-performance computing solutions while aggressively pursuing 5nm to advance our leadership for years to come.”

Tom Rosamilia, Senior Vice President, IBM Systems

“While not the only important factor in a successful technology, transistor geometry still plays a part. This is an important fab milestone on the journey to 7nm volume production, demonstrating that GF’s process is mature enough to start working on real customer product designs. At the same time, the company is already making solid progress toward delivering 5nm and beyond. There are only a handful of companies in the world capable of driving this type of leading-edge innovation, and GF is clearly staking its claim as a member of this elite group.”

Patrick Moorhead, President & Principal Analyst, Moor Insights & Strategy

“GF continues to demonstrate America’s leadership in advanced technology. If they continue this progress on 7nm, GF will be the first company to leapfrog a full node. Everyone that’s tried it in the past has failed well before this point in the process. It’s a completely new strategic approach for extracting value from Moore’s Law. By biting the bullet and skipping 10nm, GF opened up the technical bandwidth to attack 7nm head-on. Others have been dividing their resources and going for half- or even quarter-nodes.”

Dan Hutcheson, CEO and Chairman of VLSI Research

About GF:

GLOBALFOUNDRIES is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GLOBALFOUNDRIES makes possible the technologies and systems that transform industries and give customers the power to shape their markets. GLOBALFOUNDRIES is owned by Mubadala Development Company. For more information, visit https://www.globalfoundries.com.

Contacts:

Erica McGill
GF
(518) 795-4250
[email protected]

GLOBALFOUNDRIES Launches 7nm ASIC Platform for Data Center, Machine Learning, and 5G Networks

FX-7TM offering leverages the company’s 7nm FinFET process to deliver best in class IP and Solutions 

Santa Clara, Calif., June 13, 2017 – GLOBALFOUNDRIES today announced the availability of FX-7 TM, an application-specific integrated circuit (ASIC) offering built on the company’s 7nm FinFET process technology. FX-7 is an integrated design platform that combines leading-edge manufacturing process technology with a differentiated suite of intellectual property and 2.5D/3D packaging to deliver the industry’s most complete solution for data center, machine learning, automotive, wired communications, and 5G wireless applications.

Building on the continued success of FX-14, with industry-leading 56G SerDes and a legacy of ASIC expertise, FX-7 provides a comprehensive suite of tailored interface IPs including High Speed SerDes (60G, 112G), differentiated memory solutions including low-voltage SRAM, high-performance embedded TCAM, integrated DACs/ADCs, ARM processors, and advanced packaging options such as 2.5D/3D. In addition, the FX-7 portfolio enables new design methodologies and complex ASIC solutions for lower power and high-performance applications targeting hyper-scale data centers, 5G networking, and machine and deep learning applications. Future extensions are planned to support solutions for automotive ADAS and imaging applications.

“The explosion of data traffic and bandwidth in global networks is driving a new set of demands for our customers,” said Mike Cadigan, senior vice president of the ASIC Business Unit at GF. “By leveraging our most advanced 7LP FinFET process technology, the FX-7 offering continues to extend our leadership in serving our customers by delivering the most advanced lower power and high performance  ASIC solutions for new market paradigms such as data centers, deep computing, and wireless networking.”

“GF’s 7nm FinFET technology demonstrates the technology and market leadership resulting from the combination of the silicon and manufacturing expertise of GF and IBM’s former semiconductor group,” said Jim McGregor, founder and principal analyst at TIRIAS Research. “With its new FX-7 ASIC offering, GF is extending its reach beyond traditional foundry customers to a new generation of systems companies who are looking to leverage bleeding-edge silicon processes for a wide range of applications, from deep learning for artificial intelligence to next-generation 5G networks.”

Design kits for the FX-7 ASIC offering are now available to customers, with volume production expected in 2019.

About GF:

GF is a leading full-service semiconductor foundry providing a unique combination of design, development and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GLOBALFOUNDRIES offers the technologies and systems that transform industries and give customers the power to shape their markets. GLOBALFOUNDRIES is owned by Mubadala Development Company. For more information, visit https://www.globalfoundries.com.

Contacts:

Erica McGill
GF
(518) 795-4250
[email protected]

22FDX® Revving up for Automotive Applications at CDNLive EMEA

Recently, Cadence hosted its two-day European CDNLive event at a multi-purpose arena in Munich. The arena at the INFINITY Hotel & Conference Resort is also often a draw for ice-hockey tournaments, rock concerts and other high-profile events and visitors. In fact, the Bayern-Munich soccer team has gathered here before important games the last couple of years, bringing further glamour to the area.

While the Bayern Munich players did not occupy the arena this year, there was another star attraction at the show—a technical innovation heralding a new era in image processing. Dream Chip Technologies GmbH of Hannover, Germany demonstrated a system with an image processing chip designed and manufactured with GLOBALFOUNDRIES’ 22nm FD-SOI (22FDX®) technology.

Dream Chip’s ADAS SoC system platform is based on a quad ARM® A53 processor complemented with a dual ARM-R5 lock-step processor, making the chip suitable for enhanced ASIL-type security applications. The image workhorse of the chip is the Vision-P6 processor from Cadence.

Source Dream Chip: Full system architecture of the image processing platform, soon to be implemented by Dream Chip.

The Vision P6 architecture from Cadence is based on the Tensilica architecture and is targeted for Convolutional Neural Network computations (CNNs). Image objects are detected by correlation of video images with a database of known images. For applications in the car, like sign- and pedestrian-recognition, this application needs to run at real-time with 30 frames per second. In essence, it’s a massive computational comparison of pictures occurring in real-time.

The prototype shown at CDNLive is the first-ever live system with an SoC implemented with GF’s 22FDX technology.  The chip is 64mm2 and is mounted on a package substrate together with two LPDDR4 memories.

Source Dream Chip: System module with chip and two LPDDR4-memories

The Dream Chip ADAS chip is a complex and multifunctional SoC. At CDNlive, Dream Chip demonstrated video capabilities through a system board mounted on top of a model car, with the signal of a hood-mounted GoPro camera fed into the system board.

Jens Benndorf, COO of Dream Chip, explained the further signaling path: “First fed into the chip, the video signal is passed to one of the four IVPs running a filter algorithm, then passed to the video-output and on to the display. It demonstrated that the IVP6 is working.”

 

Source GF: Dream Chip live Demo setup at CDNLive EMEA

In addition to the demo, Benndorf and his team gave a number of presentations on the system, the chip architecture and the CNN-based image processing for which the chip is targeted in the near future.

Dream Chip, GF, and partners are working fast and furious (pun intended!) to accelerate the SoC prototype for production readiness. First silicon was demonstrated in February 2017 at Mobile World Congress in Barcelona, and a video on the platform was showcased at CDNLive in May. What will be next? Ride with us, and find out!  22FDX is enabling innovation in ADAS applications and eventually will for autonomous driving too. By then, Bayern Munich players will certainly notice.

About Author

Gerd Teepe

In his role as Director Marketing for Europe, Gerd is responsible for leading the CMOS Platforms marketing initiatives in this region, with focus on accelerating design wins in the IoT/Industrial and Automotive segments as well as emerging markets. Prior to this, Gerd was leading the Design Engineering Organization of GLOBALFOUNDRIES. Gerd Teepe has been with GLOBALFOUNDRIES since its creation in 2009 and is based at the FAB1-site in Dresden.

Prior to GLOBALFOUNDRIES, Gerd was with AMD, Motorola-Semiconductors, and NEC, Japan in R&D, Design, Product Management and Marketing roles.

Gerd holds a Master’s Degree and a phd from Aachen University, Germany.

 

A Bigger Role for Foundries in the Analog Market

By: Dave Lammers

A growing percentage of analog and mixed-signal ICs are being manufactured at foundries such as GLOBALFOUNDRIES.

When it comes to commentary about the semiconductor industry, we live in a big D (digital), little A (analog) world, with leading-edge digital garnering most of the attention. While analog and mixed-signal ICs account for about 15 percent of the chip industry’s revenues — $48 billion in 2016 — there is scant written about how they are manufactured. A principal reason is that, until recently, most analog parts were made on older technologies.

But that is changing.

analog market

Jim Feldhan, president of Semico Research (Phoenix), said mixed-signal chips are adding more digital content, which results in bigger chips, leading to using more advanced process technologies to keep chip size under control. “We used to talk about Big A, little D, but now there is a lot more digital circuitry being added,” he said.

The integration of analog and digital functions also leads to using 300mm wafers to control costs. “That encourages more foundry usage,” Feldhan said, adding that few analog IC companies can afford to build 300mm fabs.

Companies such as Texas Instruments have moved to 300mm manufacturing for high-volume analog parts, but very few analog companies have the capital to construct and fill a 300mm fab, he added.

The financial picture is changing in other ways as well. Analog companies once enjoyed enviable gross margins, Feldhan said, but increased competition has reduced average selling prices (ASPs) sharply over the last five years, from an analog ASP of 46 cents in 2011 to an average of 36 cents last year, according to Semico Research. That 25 percent drop in ASPs has caused more analog companies to put their investments into product development, and less into expensive capacity expansions.

“The analog companies are running into the same issues that the digital IC companies have been facing. Their margins are pretty tight, and so it is inevitable that they focus on product development and turn more to foundries,” Feldhan said.

GF has responded to these trends in two major ways: expanding analog and mixed-signal capacity, and accelerating its technology roadmap. The company’s 300mm fab in Chengdu, China, Fab 11, will add capacity for 180nm and 130nm production, as well as the 22nm fully depleted SOI (22FDX®) offering that is expected to see widespread mixed-signal usage. A 300mm fab in Singapore, Fab 7, has room for additional production of 130nm, 55nm, and upcoming 40nm analog/mixed-signal processes.

Mike Arkin, deputy director for Analog/Power Product Line at GF, said, “We see a need for more capacity. We expect to be growing substantially in the next three to five years, and when we look at our projections, the time is coming when we are going to need even more capacity. The expansion in China will allow GF to continue growing its analog and power business” for the 130nm BCDLite® and 180nm BCDLite offerings.

Arkin said many analog and mixed-signal IDMs are going fab-lite or fabless.
They are “looking for alternatives to continue their roadmaps without investing so much. Individual companies can’t stay on the treadmill like a foundry can, so we see more IDMs coming to us, reaching out, driving our roadmap and talking to us about designing into the GF processes.”

Also, more startups are targeting power management. “There are startups with brilliant ideas that no one has done. In some cases they come out of a university background and are looking for help on the process side,” Arkin said.

And, established companies that haven’t had a presence in power are designing solutions. “The companies that haven’t had a power presence need foundries, not just good mixed-signal processes today but an active roadmap to the future as well,” he said.

Adding Options and New Nodes

GF offers both a bipolar-CMOS-DMOS (BCD) process, which features deep-trench isolation and support for higher voltages as well as a lower cost, lower voltage BCDLite. (BCDLite is a patented process technology that is available only from GF).

The BCDLite process is more cost effective due to a less-complicated isolation structure, and is rated for lower voltages than traditional BCD. While BCD has a buried N layer and deep trench isolation, BCDLite uses a Triple Well isolation scheme as a cost reduction for customers which don’t need a high level of isolation.

Arkin said some companies could safely use a BCDLite process and reduce costs, compared with the BCD process.

“Many customers that use BCD are risk averse. They could use BCDLite, which operates up to 30 to 40 volts compared with 85V for BCD, and still have a robust design. For example, wireless charging could take advantage of BCDLite for consumer-oriented applications. Other industrial customers are thinking of using the automotive-grade BCD processes for assurance in high-temperature environments. There is not a hard line,” Arkin said.

BCDLite is a consumer-oriented process, but Arkin said “with automotive driving new applications customers are finding that they can take their consumer-use designs to the BCD automotive process (Grades 1 and 0) for an automotive version of their designs. This is analogous to the way traditional CMOS logic processes have been qualified and marketed for Automotive Gr1 applications.”

Expanding the Process Roadmap

Since 2010, GF has shipped a cumulative 2.3 million wafers of BCDLite. It is a “solid No. 2” in the analog foundry business, according to Arkin.

analog map

“GF is actively rolling out sub-100nm BCDLite this year,” Arkin said. “We are investing in bringing our analog and power expertise to even smaller nodes that complement our existing CMOS technologies.”

There is an array of other advances coming as well (see chart of process options), with SRAM and non-volatile memory options being offered at the 130nm BCD and BCDLite node, as well as high-voltage and ultra-high-voltage (UHV, up to 700 V) 180nm offerings.

Fewer Chips for Smaller Form Factors

Feldhan said as system companies seek to reduce the form factors of their phones and other consumer products, they are working with their IC suppliers to integrate more digital cores into their power-management products. “By putting fewer chips on the system board, that reduces the amount of reflow soldering required during assembly,” he added.

Arkin said governments around the world increasingly have been requiring less energy usage. “Things are moving faster than ten years ago, when power was flat. A watershed moment came in 2007 when the Energy Star® 4.0 added 80 PLUS® requirements for computers. That’s when the power management market began to change more to efficiency and technical differentiation, from just cost, cost, cost.”

The Future of BCDLite  

“As BCDLite is incorporated into smaller process geometries, it becomes particularly interesting for battery-powered handheld devices, such as smart phones, smart watches, glucose monitors, and many others.”

To reduce the form factor of these systems, Arkin said the IC vendors are “working to integrate devices in new and interesting ways, adding features to the socket. Most of that feature enablement is adding digital functions on top of the analog or power.”

A next node BCDLite process, he said, is “ideal” for systems running on lithium-ion batteries. Since the analog functions in most cases don’t scale as strongly as digital, vendors adding digital functions on top of analog or power capabilities must deal with cost versus die size challenges. “When they are horizontally adding digital, they have to think about how much can they pack on a single die and still be cost effective,” Arkin said.

A major analog and mixed signal customer with strong digital design expertise has solutions which support the Force Touch interface, which offers a more complex or richer way for users to interact with the touch screen. But that comes at a premium, more tightly coupling increasing digital content with the analog functions.

With Force Touch and other “sensor sensitive” features, Arkin said “A next node BCDLite process would support more processing capability co-located with analog functions. GF is working on such a process in order to extend the sensor-sensitive capabilities even more.”

Automotive is another rapidly evolving market. Mark Granger, a vice president in GF’s automotive group, said BCD and BCDLite are figuring into new automotive applications. “Power management increasingly plays a very important role in EVs (electric vehicles) being able to provide the highest efficiency as they turn the battery charge into propulsion. There are a lot of places where that technology can be used for very efficient power delivery systems.”

About Author

Dave Lammers

Dave Lammers

Dave Lammers is a contributing writer for Solid State Technology and a contributing blogger for GF’s Foundry Files. Dave started writing about the semiconductor industry while working at the Associated Press Tokyo bureau in the early 1980s, a time of rapid growth for the industry. He joined E.E. Times in 1985, covering Japan, Korea, and Taiwan for the next 14 years while based in Tokyo. In 1998 Dave, his wife Mieko, and their four children moved to Austin to set up a Texas bureau for E.E. Times. A graduate of the University of Notre Dame, Dave received a master’s in journalism at the University of Missouri School of Journalism.

 

模拟市场中晶圆厂将扮演更重要的角色

作者: Dave Lammers

在例如格芯等铸造厂的模拟及混合信号集成电路生产比例正在上升。

当我们讨论到半导体产业时,我们总是将大量关注投入到数字电路,一小部分投入到模拟电路,数字电路总是占据着最大的部分。2016年480亿美金的收益,模拟和混合电路只占市场总收益的15%,关于它们的制造更是少有人知。最主要的原因,是因为模拟电路总是在更旧的技术上实现的,直到现在。

可是事情已经出现转机。

Jim Feldhan是位于菲尼克斯的Semico Research研究中心的主席,他声称混合信号芯片正在加入更多数字内容,导致了芯片尺寸加大,转而对先进的制程技术提出了新的要求以控制芯片大小。“从前总是模拟电路比数字电路重要,现在事实完全相反。”

对模拟和数字的集成同样引入了300mm晶元以控制成分。“这刺激了更多对铸造厂的使用,”Feldhan说道,并提供了能承受300mm晶元花销的几家集成电路公司的名字。

德州仪器已经将300mm制造应用于大批量模拟部件,但是很少模拟公司可以建设300mm的制造厂。

而财政方面也在以不同的形式改变。模拟公司曾经拥有让所有人妒忌的毛利润,Feldhan说道,但是越来越多的公司在过去5年内大幅度削减了平均售价,从2011年的单价46美分到去年的36美分。这25%的缩减让大量公司将投入转移到产品部门,而不是继续对昂贵的产能进行改进。

“模拟公司正在面临数字公司曾经面对的问题,他们的收益十分紧缩,向产品部门投入并向铸造厂寻求帮助是不可避免的。”

格芯对着两个趋势都做出了回应,格芯拓张了模拟和混合信号的产能,并加快了技术发展路线。公司位于中国成都的300mm第11号铸造厂将添入180nm及130nm的制造能力,同时还有预期带动混合信号使用广度的22nm全耗尽式绝缘体上硅(22FDX®)。位于新加坡的300mm第7号铸造厂,也拥有足够的空间加入130nm,55nm和将要到来的40nm模拟/混合信号制程。

Mike Arkin是格芯模拟/供电产品线的副主管,他说道,“我们看到了对产能的需求。我们期望在接下来的3到5年能持续增长。对于我们的规划来说,增加产能的时机已经到来。向中国市场的拓张将让格芯拥有更多模拟和模拟信号的业务”此处,特指130nm BCDLite® 和180nm BCDLite®产品。

Arkin提到许多模拟及模拟信号独立设计制造商正在改为简易型生产厂或无制造厂模式。

他们正在“找寻无需增加投入的出路以延续自己的发展规划。独立公司很难像铸造厂一样坚持下去,所以我们看到了大量这样的公司向我们联系,企图与我们合作,讨论共同发展路线,研究如何使用格芯的制程进行设计。”

同样,越来越多的初创公司正在瞄准电源管理市场。“有许多初创公司具备了别人没有的创意,但是他们需要来自铸造厂的帮助,因为他们就像是刚从大学院校毕业出来,”Arkin说道。

而且,并没有在电源方面露面的公司也再设计电源方案了。“这些公司也需要铸造厂的帮助,不止是好的混合信号制程,而是积极的未来发展路线规划”他说道。

加入新的节点和选择

格芯提供双极-CMOS-DMOS(BCD)制程, 具备深沟隔绝和更高电压支持,以及更低成本更低电压的BCDLite(BCDLite为格芯独家专利)。

BCDLite制程更加具备成本高效率,这是因为它更简易的独立结构,而且它具备传统BCDLite没有的低电压。BCD技术拥有N个埋氧层和深沟隔绝特性, BCDLite技术使用三重阱隔绝方案, 并以此为不需要高度隔绝的客户节省成本。

“许多使用BCD的客户都希望能减小风险,他们可以使用BCDLite,使用30到40伏特的操作电压,而不是BCD的80伏电压,但是可以得到同样稳定可靠的设计。举个例子,无线充电就可以利用BCDLite的优势满足客户指向的应用。其他产业的客户更多地考虑汽车级别的BCD制程以确保高温环境的使用。并没有死标准。”Arkin说道。

BCDLite是客户为先的制程,但是Arkin说“当汽车自动化推动新的应用,客户们发现他们可以将自己的设计在BCD汽车制程上实现(0级或1级)并改造成专为汽车设计的应用。这比起满足汽车1级验证的传统数字CMOS更加的趋近模拟制程。”

拓展制程前进路线

自2010年以来,格芯已累计寄出230万片BCDLite晶元。这在铸造厂行业内是“铁定第二”,Arkin说道。

“格芯正在积极推出100nm一下的BCDLite技术”, Arkin说道”我们正在为现有CMOS技术带来更小节点的补充,并引入模拟和混合信号人才。”

还有大量的不同优势即将展现(请参照制程选项表),SRAM和非易失性内存已在130nm BCD和BCDLite节点提供,同样提供的还有高压和超高压(高达700伏特)180nm产品。

更少的芯片,更小的尺寸

Feldhan提到,当系统公司努力减小他们的手机和其他消费者应用的尺寸,他们与集成电路供应商合作,在能源管理产品中集成更多的数字核心。“通过加入更少的芯片,可以减少在封装过程中所需的回流焊接,”他补充道。

Arkin说全世界的政府都在要求更少的能源消耗。“现在事物的发展比10年前快得多,可是能耗是持平的。分水岭出现在2007年,当能源之星4.0为计算机添加了80PLUS®指标。这是能源管理市场变化的开始,要求从只是成本转移向高效和技术独特性。”

BCDLite的未来

“BCDLite技术正在应用于更小几何尺寸的制程,对电池管理类设备例如智能手机,只能手表,血糖仪等等具备独特的吸引力。”

为了将上述系统的尺寸减小,Arkin生成集成电路商正在“用新奇有趣的方式集成设备,添入新的功能。大多数这些添加功能都是在模拟或供电基础上加入数字功能。”

他说,下一个BCDLite制程节点对于锂电池类系统是“完美”的。由于模拟功能通常比重不如数字功能,供应商在添加数字功能上必须解决成本尺寸比的问题。“当他们横向添加数字功能时,他们必须考虑在不影响成本的情况下一块芯片上能放多少东西。”

有一家主流的模拟与混合信号公司,拥有深厚的数字电路知识,提供了新的方案,可使用力度感应进行触屏控制,这提供了复杂而丰富的人机界面。但是这来自模拟和数字电路成分的紧密对等性。

对于压力感应和其他“探测器敏感”型功能,Arkin声称“下一个BCDLite制程节点将支持更多模拟的制程功能。格芯正在努力开发此类制程,以此进一步开拓探测器类型的功能。”

汽车自动化是另一个快速进化的市场。Mark Granger是格芯自动化组的副总裁,他声称BCD和BCDLite正在进入汽车自动化应用。“能源管理正在扮演愈发重要的角色,特别是对于电动车,将电量高效转化为动力上。还有许多其他市场都需要BCD和BCDLite技术,因为他们可带来高效的功率传输系统。”

关于作者

Dave Lammers

Dave Lammers是固态技术特约撰稿人,也是格芯的Foundry Files的特约博客作者。他于20世界80年代早期在美联社东京分社工作期间开始撰写关于半导体行业的文章,彼时该行业正经历快速发展。他于1985年加入E.E. Times,定居东京,在之后的14年内,足迹遍及日本、韩国和台湾。1998年,Dave与他的妻子Mieko以及4个孩子移居奥斯丁,为E.E Times开设德克萨斯办事处。Dave毕业于美国圣母大学,获得密苏里大学新闻学院新闻学硕士学位。

 

Perceptia加入格芯的FDXcelerator™项目,将PLL技术带入便携式设备

Scotts Valley, California – May 25, 2017 – Perceptia Devices, Inc., a developer of innovative phase-locked loop (PLL) and timing technology, today announced that it has joined GLOBALFOUNDRIES’ FDXcelerator™ Partner Program, an expanding FD-SOI ecosystem to enable faster, broader deployment of the foundry’s 22FDX® and 12 FDX™ FD-SOI processes that support IoT, mobile, and wireless applications.