Optimized for AI Accelerator Applications, GLOBALFOUNDRIES 12LP+ FinFET Solution Ready for Production June 30, 2020Built on a proven platform with a robust production ecosystem, 12LP+ offers AI application designers an efficient development experience and fast time-to-market Santa Clara, Calif., June 30, 2020 – GLOBALFOUNDRIES® (GF®), the world’s leading specialty foundry, today announced its most advanced FinFET solution, 12LP+, has completed technology qualification and is ready for production. GF’s differentiated 12LP+ solution is optimized for artificial intelligence (AI) training and inference applications. Built on a proven platform with a robust production ecosystem, 12LP+ offers chip designers an efficient development experience and a fast time-to-market. Contributing to its best-in-class combination of performance, power and area, 12LP+ introduces new features including an updated standard cell library, an interposer for 2.5D packaging, and a low-power 0.5V Vmin SRAM bitcell that supports the low latency and power-efficient shuttling of data between the AI processors and memory. The result is a semiconductor solution engineered to meet the specific needs of the fast-growing AI market. “Artificial intelligence is on a trajectory to become the most disruptive technology of our lifetime,” said Amir Faintuch, senior vice president and general manager of Computing and Wired Infrastructure at GF. “It is increasingly clear that the power efficiency of AI systems – in particular how many operations you can wrest from a watt of power – will be among the most critical factors a company considers when deciding to invest in data centers or edge AI applications. Our new 12LP+ solution tackles this challenge head-on. It has been engineered and optimized, obsessively so, with AI in mind.” 12LP+ builds upon GF’s established 14nm/12LP platform, of which GF has shipped more than one million wafers. GF’s 12LP is being used by companies including Enflame, Tenstorrent, and others for AI accelerator applications. By partnering closely and learning from AI clients, GF developed 12LP+ to provide greater differentiation and increased value for designers in the AI space while minimizing their development and production costs. Driving the enhanced performance of 12LP+ are features including a 20-percent SoC-level logic performance boost over 12LP, and a 10-percent improvement in logic area scaling. These advancements are achieved in 12LP+ through its next-generation standard cell library with performance-driven area optimized components, single Fin cells, a new low-voltage SRAM bitcell, and improved analog layout design rules. 12LP+, a specialized application solution, is augmented by GF’s AI design reference package, as well as GF’s co-development, packaging, and post-fab turnkey services – which together enable a holistic experience for designing low-power, cost-effective circuits optimized for AI applications. Close collaboration between GF and its ecosystem partners results in cost-effective development costs and a quicker time to market. In addition to 12LP’s existing IP portfolio, GF will expand the IP validations for 12LP+ to include PCIe 3/4/5 and USB 2/3 to host processors, HBM2/2e, DDR/LPDDR4/4x and GDDR6 to external memory, and chip-to-chip interconnect for designers and clients pursuing chiplet architectures. GFs’ 12LP+ solution has been qualified and is currently ready for production at GF’s Fab 8 in Malta, New York. Several 12LP+ tape-outs are scheduled for the second half of 2020. GF recently announced it would bring its Fab 8 facility into compliance with both the U.S. International Traffic in Arms Regulations (ITAR) standards and the Export Administration Regulations (EAR). These new control assurances, which will go into effect later this year, will make confidentiality and integrity protections available for defense-related applications, devices or components manufactured at Fab 8. Click here to learn more about GF’s 12LP 12nm FinFET technology. About GF GLOBALFOUNDRIES (GF) is the world’s leading specialty foundry. GF delivers differentiated feature-rich solutions that enable its clients to develop innovative products for high-growth market segments. GF provides a broad range of platforms and features with a unique mix of design, development and fabrication services. With an at-scale manufacturing footprint spanning the U.S., Europe and Asia, GF has the flexibility and agility to meet the dynamic needs of clients across the globe. GF is owned by Mubadala Investment Company. For more information, visit www.globalfoundries.com. Contact: Michael MullaneyGLOBALFOUNDRIES518-305-1597[email protected]
PDK：实现硅晶设计一次性成功的关键要素 June 23, 2020 撰文：Gary Dagastine 在汽车等对故障零容忍的应用领域中，集成电路（IC）变得越发复杂，愈加重要，为此，准确建模和验证IC设计在给定应用中的性能和可靠性，是当前急需具备的重要能力。这种能力是实现硅晶设计一次性成功的关键，也是工艺设计套件（PDK）这种低调的实用工具如今备受关注的原因所在。 PDK是一组描述半导体工艺细节的文件，供芯片设计EDA工具使用。客户会在投产前使用晶圆厂的PDK，确保晶圆厂能够基于客户的设计生产芯片，保证芯片的预期功能和性能。 格芯®（GLOBALFOUNDRIES®）努力保障客户能使用PDK快速而经济地创建针对特定应用的IC，发挥格芯差异化技术平台提供的独特优势。 格芯设计实现副总裁Richard Trihy表示：“PDK是我们与客户之间的主要接口与重要触点，因为如果客户无法在格芯PDK中找到达成功耗、性能与面积（PPA）目标的方法，他们就不会与我们合作。” 他说：“仅去年一年，我们就发布了数百个不同的PDK，充分证明了格芯的解决方案不仅功能丰富，还高度差异化。但考虑到PDK可能有几百GB大，包含数以万计的文件，所以我们也力求在我们的不同技术平台上实现标准化接口，让PDK更加灵活、更具交互性，更易于下载和使用。” 在Trihy的领导下，格芯去年从多个方面推进了PDK研发工作，包括：扩充格芯设计与工程团队的规模和职能，使之能在整个设计过程中充分配合客户；执行战略投资，比如并购Smartcom的125人PDK工程团队；开发符合应用需求的差异化PDK功能；扩展格芯的合作伙伴生态系统。 PDK中包含什么？ 在格芯PDK中，包含以下内容： 技术文件 – 描述相关设计规则与设计规则检查工具； 参数化单元（PCell） – 描述晶体管（及其他器件）的可能定制方法，供设计师在EDA工具中使用； 寄生参数提取及版图与原理图对照文件 – 描述半导体器件，供EDA工具识别版图中的器件并在网表中准确呈现； 器件型号 – 描述模拟中用到的所有无源和有源器件（如晶体管）的电气行为。 除此之外，PDK中还包含很多其他组件技术文件，例如布局与布线、填充、EM/IR、电磁模拟和需要额外支持的专业EDA工具。另外，有多家EDA供应商提供彼此竞争的工具，而格芯设计支持部门的部分工作就是为客户需要的各种工具提供支持。 Trihy称：“有两个要素对我们的设计支持与PDK交付工作至关重要。第一个关键要素是质量保证（QA）。PDK QA团队不仅要验证PDK的每个组件是否准确无误，还要验证工具间的接口和总体设计流程是否正确且恰当。” 他表示：“第二个关键要素是一系列参考流程和设计指南，用于描述设计流程如何运作，并为客户提供建议，帮助客户利用PDK取得理想结果。作为参考流程的一部分，我们的团队会与EDA供应商密切协作，确保格芯差异化技术背后的所有主要特性都在工具中得到支持。” Trihy解释道，随着芯片设计在功能层面变得日益复杂，设计方法指南也变得越来越重要。高度集成的片上系统（SoC）设计包含收发器、计算、模拟和非易失性存储模块，需要相应的参考流程加以辅助。 Trihy称：“模块级协同设计和2.5D/3D封装正逐渐成为晶圆厂的一大竞争优势，而作为开发合作伙伴，EDA供应商在助力PDK突破芯片层面上发挥着重要作用。出于对信号完整性和热管理的需求，需要使用协同设计方法和支持性CAD工具，且必须涵盖上至毫米波频率的各种工作条件。这是一个非常活跃的开发领域，从长远来看，将在我们的PDK中创建新的内容与结构。而此类挑战对辅助文档和上手指南提出了新的要求。” 格芯移动和无线基础架构业务部门副总裁Peter Rabbeni表示：“我们与生态系统合作伙伴紧密协作，确保格芯的PDK不仅与主流EDA供应商的设计软件无缝接合，也兼容其他常用的第三方工具集。例如，电磁模拟器是毫米波IC设计的关键，我们的客户在电磁模拟器方面会有很多选择，我们的生态系统合作伙伴也会与我们密切合作，将这些电磁模拟器集成进我们的PDK中。” 深入分析可靠性 相比于传统的数据处理应用，任务关键型应用要求对IC性能与可靠性进行更为深入的分析，因而如今的设计师在设计高度集成的复杂IC时面临诸多挑战。 准确建模是关键，因为材料、工艺和封装的可变性，外加寄生现象和加速老化等二次电效应的作用，都会严重影响可靠性。如果PDK无法让设计师就可变性对设计的影响进行充分建模，那按照此设计最终产出的芯片，可能不会在所有条件下都按预期运行，还可能会过早老化和出现意外故障。 此外，晶圆厂的PDK必须确保良好的模型到硬件关联（MHC），让客户能够“所模拟即所得”。格芯企业应用工程组总监Kenneth Barnett表示：“一次性完成硅晶设计是我们的一贯目标，因为客户的芯片越快通过认证，制造成本就越低，也能更快进入市场。然而，纵观整个行业，认证失败依然是个老大难问题。” 他说：“我们经过努力，成为了一次性完成硅晶设计的佼佼者。如今，依托行业先进的射频、可靠性和热耦合模型，我们能够提供出色的MHC成果。我们还创建了一系列参考流程，帮助客户更好地理解怎样使用格芯的差异化技术设计复杂应用的IC，从而提升了我们的一次性成功率。这些参考设计使用各种格芯技术平台构建，包括用于5G/毫米波和卫星通信应用的45RFSOI解决方案，以及用于移动处理器和无线联网、IoT及汽车市场的22FDX® FD-SOI解决方案。” 格芯还不断向自身PDK中加入创新知识产权。格芯的90nm 9HP锗硅（SiGe）解决方案就是一个很好的例子。格芯设计实现团队的技术专家Adam DiVergilio提到了公司新开发的一个算法，这个算法可供设计师使用9HP平台对高度复杂的模型库进行基于可靠性的模拟。“我们的生态系统合作伙伴Cadence在其RelXpert可靠性模拟器中融入了对我们架构的支持，因而现在能够在我们的硅锗PDK中更高效地支持可靠性模拟。” 射频/毫米波的独特优势 据Barnett介绍，格芯的22FDX平台具有良好的通用性，称得上是芯片技术界的“瑞士军刀”。他说：“22FDX为用户提供强大的处理能力，凭借背栅偏置功能，22FDX平台可针对高性能或低功耗使用场景加以调整，良好适应需要模拟/混合信号片上系统的各种应用，因而有了‘瑞士军刀’的美誉。为此，我们得向客户提供尽可能好的PDK，让客户能够充分利用这些功能。” Barnett举出了在22FDX中对射频/毫米波应用IC设计进行建模和验证的例子。这些应用因为涉及复杂的物理特性，理解起来很困难，但这正代表了格芯的核心竞争力，建立在收购IBM微电子业务所获得的几十年经验基础之上。 Barnett称：“我们PDK中内置的格芯知识产权，让我们的客户能够创建优良的解决方案。例如，在无线通信应用中，格芯22FDX平台用到的PDK，就使客户能够创建功率放大器（PA）与前端集成的解决方案，从而提高输出功率，降低LAN噪声，大幅改善链路预算。” Peter Rabbeni称，格芯射频/毫米波应用模型的品质非常优异。“我们模型的工作频率高于典型值，高达110 GHz，因为在高频上捕捉器件运行状况很重要。我们使用多年来开发的一套专用方法，在持续改进的过程中，利用物理测试站点将我们的模型与实际测量相关联。” 因此，他表示，格芯PDK使客户能够更容易地适应射频/毫米波设计领域正在经历的重大变迁。5G基础设施的新型大规模多入多出（MIMO）和相控阵系统就是个很好的例子。与之前的系统采用单一信号链不同，这些系统采用了多个功率放大器和信号链来聚合和增强辐射能量信号。由于功率分布在很多元件而非单个元件上，如今这一增强辐射功率的新方法令硅晶成为了砷化镓（GaAs）或氮化镓（GaN）基系统的有力竞争者。 Rabbeni称：“为了从阵列获取优异性能，客户需要知道每个元件可被驱动的程度，但如果没有我们PDK提供的精准可靠性和长效模型，可能不得不在非理想条件下操作PA器件以确保其可靠性。而在这种情况下，为达到预期性能，有可能需要过度设计系统，添置更多PA，导致成本和功率预算大幅增加。”
PDKs: Powerful Enablers of First-Pass Silicon Success June 23, 2020 by Gary Dagastine As integrated circuits (ICs) become more complex and vital in applications where failure can’t be tolerated – such as automotive – the ability to accurately model and verify a proposed IC design’s performance and reliability in a given application has taken on urgent importance. This ability is critical to achieving first-pass successful silicon, and it is why that humble workhorse, the process design kit (PDK), now finds itself in the spotlight. The PDK is a collection of files which describe the details of a semiconductor process to the EDA tools used to design a chip. Clients use a foundry’s PDKs prior to production to ensure that the foundry can produce chips based on their designs, and that they will work as intended. GLOBALFOUNDRIES has a major effort underway to ensure that its PDKs give clients an unrivaled ability to quickly and cost-effectively create ICs optimized for applications where GF’s differentiated technology platforms offer unique advantages. “PDKs are the primary interface and the most important touchpoint a client has with us, because if the client doesn’t see a way to achieve its power, performance and area (PPA) goals within a GF PDK, then they’re not going to engage with us in the first place,” said Richard Trihy, GF’s vice president of design enablement. “Last year alone we released hundreds of different PDKs, which is a testament to GF’s highly differentiated and feature-rich solutions,” he said. “But given that a PDK can be hundreds of gigabytes in size, and may have tens of thousands of individual files, our goal also has been to make them more nimble, interactive, and easier to download and use, with standardized interfaces across our diverse technology platforms,” he said. Led by Trihy, GF’s focus on PDKs over the past year has benefited from initiatives on multiple fronts. These include expansion of the size and capabilities of GF’s design and engineering teams, which are available to work with customers throughout the design process; strategic investments like the acquisition of the 125-person PDK engineering team from Smartcom; development of differentiated PDK features that are matched to application requirements; and growth of GF’s partner ecosystem. So What’s in a PDK? In a GF PDK you will find: Technology files that describe the relevant design rules, along with design rule checking tools; Parameterized cells, or PCells, which describe the possible customizations of transistors and other devices) which are available to designers in the EDA tools; Parasitic-extraction and layout-versus-schematic decks that describe a semiconductor, so that an EDA tool can recognize devices in a layout and generate accurate representation in a netlist; Device models that describe the electrical behavior of all the passive and active devices (i.e., transistors) to be used in a simulation. There are many other component tech files in the PDK such as place-and-route, fill decks, EM/IR, electromagnetic simulation and specialty EDA tools that need additional enablement. In addition, multiple EDA vendors provide competing tools, and part of the job of GF’s Design Enablement organization is to enable all of those tools that our clients need. “Two key elements are critical to our design enablement and PDK delivery,” Trihy said. “The first is quality assurance, or QA. The PDK QA team verifies not only that each component of the PDK is correct, but that the interfaces between the tools and the overall design flow is correct. “The second key element is a collection of reference flows and design guidelines, which are essential in representing how the design flow works and for providing recommendations to our clients to get the best results with the PDK,” he said. “As part of a reference flow, our team collaborates very closely with EDA vendors to ensure all key features enabling GF’s differentiated technology are supported in the tools. Trihy explained that as chip designs increase in functional complexity, guidance on design methodology becomes increasingly important. Reference flows for highly integrated SoC designs are needed which incorporate transceiver, compute, analog, and non-volatile memory blocks. “Enabling block-level co-design together with 2.5D/3D packaging is emerging as a competitive foundry differentiator, and EDA vendors play a key role as development partners to expand the PDK horizon beyond the chip-level,” he said. “Signal integrity and thermal management drive co-design methods and supporting CAD tools, which must comprehend a diverse range of operating conditions up to millimeter-wave frequencies. This is a very active area of development which will create new content and structure in our PDKs over the long run. Such challenges place new demands on documentation and guidelines which sustain ease-of-use.” Peter Rabbeni, vice president of GF’s Mobile & Wireless Infrastructure business unit, said, “We work closely with our ecosystem partners to ensure that GF’s PDKs interface seamlessly not only with design software from leading EDA vendors but also with other commonly used third-party toolsets. For example, clients have many options when it comes to choosing an electromagnetics simulator, which is critical for the design of mmWave ICs. Our ecosystem partners work closely with us to integrate them into our PDKs.” A Deep Dive Into Reliability Designers of today’s complex, highly integrated ICs face many challenges, given that mission-critical applications require a much deeper analysis of IC performance and reliability than is typical with chips destined for more traditional data-processing applications. Accurate modeling is key because variability in materials, processing and packaging – along with the impact of secondary electrical effects such as parasitics and accelerated aging – have a major impact on reliability. If a PDK is incapable of allowing a designer to adequately model the effects of variability on a design, then the chip which is ultimately produced based on that design may not work as intended under all conditions, and/or it may age prematurely and fail unexpectedly. In addition, the foundry’s PDKs must ensure there is good model-to-hardware correlation (MHC), so that what clients simulate is what actually gets built. “First-pass success in silicon is always the goal because the faster a client’s chip can be qualified, the lower its manufacturing costs will be and the faster it can get to market. However, across the industry, qualification failures continue to be a huge problem,” said Kenneth Barnett, director of GF’s corporate application engineering group. “We’ve worked hard to become a leader in first-pass success, and we now offer superior MHC results, based on the industry’s best RF, reliability and thermal coupling models,” he said. “We’ve also created a number of reference flows that add to our first-pass success rates by helping clients better understand how to design ICs for complex applications using GF’s differentiated technologies. These reference designs have been built using various GF technology platforms; among them are our 45RFSOI solution for 5G/mmWave and SatComm applications, and our 22FDX® FD-SOI solution for mobile processors and the wireless networking, IoT and automotive markets.” GF is also continually adding innovative IP to its PDKs. A case in point is GF’s 90nm 9HP SiGe solution. Adam DiVergilio, technical expert on GF’s design enablement team, pointed to a new algorithm GF developed that enables designers working with the 9HP platform to make reliability-based simulations for libraries of highly complex models. “Our ecosystem partner Cadence incorporated support for our architecture into its RelXpert reliability simulator, and as a result we are now able to more efficiently support reliability simulations in our SiGe PDKs.” Unique Advantages for RF/mmWave GF’s 22FDX platform can fairly be called the “Swiss Army Knife” of chip technology because of its versatility, according to Barnett. “22FDX offers users substantial processing power, and its back-biasing capability enables it to be tailored for either high performance or low power uses, making it well-suited to diverse applications that require analog/mixed-signal SoCs, hence the nickname,” he said. “Therefore, we have to provide our clients with the best PDKs possible so that they can take full advantage of these features.” He gave the example of modeling and verifying IC designs in 22FDX for RF/mmWave applications. These are among the most difficult applications to fully understand given the complex physics involved, but they represent a core competency for GF, based on the decades of experience gained with the IBM Microelectronics acquisition. “The proprietary GLOBALFOUNDRIES IP embedded in our PDKs enables clients to create far better solutions than they could anywhere else,” Barnett said. “For example, in wireless communications applications, the PDKs for use with GF’s 22FDX platform enable clients to create solutions where the power amplifier (PA) is integrated with the front-end, which results in higher output power, lower LNA noise, and a dramatically improved link budget.” Peter Rabbeni said the quality of GF’s models for RF/mmWave applications is unmatched. “We characterize our models well above typical operating frequencies, up to 110 GHz, because it is important to capture device operation at these high frequencies. We use a proprietary methodology which we have developed over many years, and we leverage physical test sites that enable us to correlate our models with actual measurements in a process of continuous improvement.” As a result, he said, GF’s PDKs are enabling clients to adapt more easily to seismic shifts in RF/mmWave design that are taking place. One example is newer massive MIMO and phased array systems for 5G infrastructure, which use multiple power amplifiers and signal chains to aggregate and develop the radiated energy signal rather than a single signal chain that we have seen in previous systems. This new approach to the development of radiated power now makes silicon a very powerful contender against GaAs or GaN-based systems since the power is distributed across many elements rather than just a single element. “The ability to extract the best performance from the array requires a client to know how much each element can be driven, but if you didn’t have the benefit of accurate reliability and lifetime models that are available in our PDKs, you might be forced to operate a PA device at less than ideal conditions to ensure its reliability,” Rabbeni said. “And in that case, one might need to overdesign the system with many more PAs, at much greater cost, and with a much higher power budget in order to achieve the desired performance.”
GlobalFoundries to Acquire Land in Malta, NY, Positioning its Advanced Manufacturing Facility for Future Growth June 22, 2020 Land purchase option increases Fab 8 footprint for future development to support growing client and U.S. government technology development needs Malta, NY, June 22, 2020 – GlobalFoundries® (GF®), the world’s leading specialty foundry and the leading U.S. pure-play manufacturer of semiconductors, today announced it has secured a purchase option agreement for approximately 66 acres of undeveloped land adjacent to its most advanced manufacturing facility, Fab 8, in Malta, N.Y., near the Luther Forest Technology Campus (LFTC). The land parcel is located at the southeast end of the New York State Energy Research and Development Authority (NYSERDA) Saratoga Technology + Energy Park (STEP) campus, adjacent to Stonebreak Road Extension, between GF’s Fab 8 facility and Hermes Road. Exercising the option to purchase the land and commencement of development to expand GF’s Fab 8 facility will be subject to zoning regulations and client demand. The parcel is being sold at Fair Market Value, with a purchase price determined by an independent appraiser. “Amid growing consensus in our nation’s capital for investment in semiconductor manufacturing, it’s more important than ever that we are ready to fast track our growth plans at GLOBALFOUNDRIES’ most advanced manufacturing facility in the U.S.,” said Ron Sampson, senior vice president and general manager of U.S. Fab Operations at GF. “With this agreement option, we now have additional flexibility to expand our footprint and position Fab 8 for future growth in Saratoga County and New York State, while strengthening U.S. leadership in semiconductor manufacturing.” “GLOBALFOUNDRIES continues to demonstrate its commitment to economic growth in Saratoga County and Upstate New York,” said Darren O’Connor, Malta’s Town Supervisor. “I am pleased to hear that this latest step will enable future growth opportunities for GLOBALFOUNDRIES for years to come.” GF employs nearly 3,000 people and has invested over $13 billion in Fab 8, its most advanced manufacturing facility in upstate New York. The company recently announced it is bringing its most advanced Fab 8 facility in upstate New York into compliance with both the U.S. International Traffic in Arms Regulations (ITAR) standards and the highly restrictive Export Control Classification Numbers (ECCNs) under the Export Administration Regulations (EAR). About GF GLOBALFOUNDRIES (GF) is the world’s leading specialty foundry. GF delivers differentiated feature-rich solutions that enable its clients to develop innovative products for high-growth market segments. GF provides a broad range of platforms and features with a unique mix of design, development and fabrication services. With an at-scale manufacturing footprint spanning the U.S., Europe and Asia, GF has the flexibility and agility to meet the dynamic needs of clients across the globe. GF is owned by Mubadala Investment Company. For more information, visit www.globalfoundries.com. Contact: Erica McGillGLOBALFOUNDRIES(518) 795-5240[email protected]
GlobalFoundries and SkyWater Technology Sign MOU for Technology Development to Strengthen Domestic Supply Assurance for U.S. Government June 18, 2020 Collaboration will extend the domestic manufacturing supply capabilities of the U.S. and enable long-term access to cutting-edge, secure semiconductor solutions Santa Clara, Calif., and Bloomington, Minn., June 18, 2020 – GlobalFoundries® (GF®), the world’s leading specialty foundry and a longtime supplier of microelectronics to the U.S. Department of Defense (DoD), and SkyWater Technology, a U.S.-based and owned Trusted Foundry, today announced the companies have signed a Memorandum of Understanding (MOU) to manufacture secure solutions for the U.S. defense industrial base and cooperate on development of emerging technologies. The partnership will strengthen domestic supply and provide secure access to advanced technologies, while extending the availability and sustainability of Trusted semiconductor manufacturing in the U.S. GF’s proven track record as a longtime supplier of secure semiconductor solutions for the defense industry dovetails with SkyWater’s focus on developing capabilities for enabling critical microelectronics technologies for national security applications. Notably, SkyWater is bringing to market a 90nm Strategic Rad-Hard process technology via an up to $170M DoD investment which, when combined with diverse GF platforms, will provide a richer portfolio of key defense technology offerings. The collaboration is also exploring possibilities for dual fab processing that would streamline access to secure technologies for defense programs. Additionally, as a part of the MOU, GF and SkyWater will align technology roadmaps and leverage unique and complementary capabilities for development and high-volume production path to market for advanced computing, artificial intelligence and related technologies. “SkyWater’s strategic relationship with the U.S. government provides distinct value and through this developing partnership accelerates our collective commitment to strengthen domestic manufacturing capabilities while streamlining access for aerospace and defense clients,” said Mike Hogan, senior vice president and general manager of AIM SBU and Aerospace and Defense at GF. “As Trusted semiconductor manufacturers, we are in a unique position to extend the availability of advanced technologies, while ensuring a secure eco-system for dual domestic sourcing to serve the U.S. government and its technology needs for the future.” “GF’s support of defense programs is long and distinguished and we’re excited to begin a new chapter of cooperation to enhance our support for this important community,” said Dr. Brad Ferguson, Chief Technology Officer and Sr. Government Relations Executive at SkyWater Technology. “This MOU shows proactive industry cooperation that can complement developing government policy focused on restoring American leadership for semiconductor manufacturing.” Senator Patrick Leahy (D-Vt.), a longtime partner with the Essex-based fab, said, “This partnership helps strengthen a secure supply chain for our nation’s most sensitive technology. Americans and Vermonters especially have long been leaders in designing and manufacturing highly advanced technology. The agreement announced today will improve U.S. competitiveness and leadership in this vital sector.” Minnesota Congressman, Dean Phillips, stated, “I’m on a mission to inspire collaboration and bring more of our hard-earned tax dollars back to Minnesota. I’m pleased that the agreement between SkyWater in Bloomington and GlobalFoundries accomplishes both. This partnership will help ensure that Minnesota continues to be a national leader in advanced technology and high-skill job creation.” About SkyWater Technology SkyWater is the only U.S.-owned and U.S.-based pure play semiconductor foundry and is a DoD-accredited Trusted supplier, specializing in custom design and development services, design IP, and volume manufacturing for integrated circuits and micro devices. Through its Technology Foundry model, SkyWater’s world-class operations and unique processing capabilities enable mixed-signal CMOS, power, rad-hard and ROIC solutions. SkyWater’s Innovation Engineering Services empower development of superconducting and 3D ICs, along with carbon nanotube, photonic and MEMS devices. The company serves customers in growing markets such as aerospace & defense, automotive, biomedical, cloud & computing, consumer, industrial, and IoT. For more information, please visit: www.skywatertechnology.com/. About GF GlobalFoundries (GF) is the world’s leading specialty foundry. GF delivers differentiated feature-rich solutions that enable its clients to develop innovative products for high-growth market segments. GF provides a broad range of platforms and features with a unique mix of design, development and fabrication services. With an at-scale manufacturing footprint spanning the U.S., Europe and Asia, GF has the flexibility and agility to meet the dynamic needs of clients across the globe. GF is owned by Mubadala Investment Company. For more information, visit www.globalfoundries.com. GF Contact: Erica McGillGlobalFoundries(518) 795-5240[email protected] SkyWater Contacts: Ross MillerDirector of Marketing(952) 851-5063[email protected] Lauri JulianPublic Relations Specialist(949) 280-5602[email protected]
格芯计划在其先进的美国半导体制造厂实施ITAR和严格的安全保证措施 May 26, 2020公司将进一步扩充这家先进工厂的能力，大力支持美国政府国防技术的开发与制造，同时进一步减轻美国对海外供应商的依赖 加利福利亚州圣克拉拉，2020年5月20日 –格芯®（GLOBALFOUNDRIES®）是全球领先的特殊工艺半导体代工厂，也是美国纯晶圆半导体制造商的个中翘楚。公司今日宣布计划在其最先进的制造厂（位于纽约州马耳他的Fab 8）率先实施出口管制安全措施。格芯将在Fab 8大力贯彻美国国际武器贸易条例（ITAR）标准及出口管制条例（EAR），助力公司跻身美国最先进的ITAR晶圆厂。格芯迈出了重要的这一步，既能深化与美国国防部（DoD）及美国国防工业基地的合作，又能进一步支持新保证措施的持续开展，推动实现国家安全目标。 这些全新的管制保证将于今年晚些时候生效，以保护格芯Fab 8生产制造的国防相关应用、设备或组件的保密性和完整性。到目前为止，格芯在Fab 8的投资已逾130亿美元，对美国政府及其技术需求的支持能够延续数十年，此次迈出的这一步可谓意义重大。 参议院民主党领袖查克·舒默（Chuck Schumer）评价说：“我一直坚信，制造半导体芯片最安全的方式就是美国自给自足。我本人是格芯的忠实拥护者，对于他们努力为美国政府提供符合ITAR及EAR标准的制造成果，我表示由衷的欣赏。通过与格芯合作，纽约州在安全的半导体制造方面已处于全国领先水平。” 格芯首席执行官Tom Caulfield表示：“作为差异化技术领域的创新先锋和关键供应商，增加这些能力使我们如虎添翼，格芯将能为美国国防工业基地开发和制造安全的解决方案，格芯是ITAR以及有严格限制的EAR微电子产品的长期供应商，我们愿为美国实现和维持半导体制造业领导地位的宏伟愿景提供有力支持。今天的声明更是彰显了我们能够且愿意与行业及美国政府合作，以确保美国具备完善的制造能力，为安全性和灵敏度要求至高的行业提供半导体产品。” 作为美国国防部所用微电子产品的长期供应商，格芯具有得天独厚的优势，能够为安全政府计划提供支持——由其备受信赖的制造厂负责，分别是位于佛蒙特州伯灵顿的Fab 9和位于纽约州东菲什基尔的Fab 10，同时也与美国国防部合作开发下一代保证措施——由位于纽约州北部地区的Fab 8负责。格芯Fab 8拥有近3,000名员工以及充足的基础设施和占地面积，足以即时承担起开发安全制造方法的责任。 此外，格芯的全球制造规模也是一大关键优势，作为唯一在美国、欧洲和新加坡均设有制造业务的纯晶圆代工厂，格芯通过盾牌（Shield）计划为安全制造树立了至高的行业、客户和政府标准。 About GF GLOBALFOUNDRIES (GF) is the world’s leading specialty foundry. GF delivers differentiated feature-rich solutions that enable its clients to develop innovative products for high-growth market segments. GF provides a broad range of platforms and features with a unique mix of design, development and fabrication services. With an at-scale manufacturing footprint spanning the U.S., Europe and Asia, GF has the flexibility and agility to meet the dynamic needs of clients across the globe. GF is owned by Mubadala Investment Company. For more information, visit www.globalfoundries.com. Contact: Erica McGill GLOBALFOUNDRIES (518) 795-5240 [email protected]
“发明大师”推动格芯的创新和差异化发展 May 21, 2020格芯精英计划表彰多名员工，肯定了他们身为发明者、导师和顾问所取得的丰硕成果 撰文：Michael Mullaney Shesh Mani Pandey清晰地记得他的第一项专利：制造高增益垂直双极性结型晶体管的新方法。这种新方法充分兼容CMOS工艺，生产出的器件性能显著优于当时的可用器件。 尽管时隔20余年，Pandey从未忘记在授权专利上看到自己的名字，以及收到经理和公司领导发送的祝贺电子邮件时的那种成就感和自豪感。他表示，在为实现技术创新而欢欣鼓舞之余，还有一种如释重负的感觉，终于成功地走完了漫长、曲折、有时甚至有几分神秘的专利准备和申请之路。 “刚开始时，我追求专利的积极性很高，但我并不清楚如何获得专利。当我获得第一项专利时，我很高兴。我真的非常兴奋，我有一种‘好的，我能做到’的感觉，现在我对这个过程有了更深的了解。”格芯工程师，同时长期担任公司设备团队技术主管的Pandey说道。 Pandey之前就职于特许半导体（Chartered Semiconductor），该公司于2009年被格芯收购，多年来，他对发明的热情有增无减。如今，他拥有超过45项与半导体制造相关的各种技术专利。除了负责的项目以外，他还花时间为有创造力的同事提供建议和指导，这些同事正在其职业道路上蓄势待发，着手申请自己的第一项专利。 由于致力于创新和扩大格芯的知识产权(IP)组合，Pandey成为去年被赋予格芯“发明大师”荣誉头衔的11名员工之一。获得这项荣誉的同事至少要拥有20项美国授权专利，并且在技术成就和知识产权资产创造方面拥有出色的记录。 常驻纽约州马耳他Fab 8的Pandey表示：“格芯使发明者可以轻松申请知识产权。作为一家企业，我们支持并鼓励员工申请专利。我们鼓励资深发明者指导他人，帮助大家了解追求发明和知识产权的价值。从我们的员工一直到高层领导，大家对此看法一致。创新真正融入了我们的企业文化。” 格芯发明大师计划 格芯的发明大师计划现已进入第三个年头，这是一个奖励多产员工以及激励一直想提交发明申请专利的其他员工的强大平台，常驻佛蒙特州伯灵顿附近格芯Fab 9的格芯知识产权法律总监David Cain表示。 迄今为止，格芯已表彰约50名发明大师，Cain说他们是“公司在创新领域的耀眼明星……在发明和专利方面有着惊人成就的人。”在激励并指导同事的同时，发明大师还担任顾问，是格芯技术领导者和法律团队在各种技术、战略和知识产权主题方面的强大资源。 格芯的发明大师计划和创新文化也具有外部优势。Cain表示，除了收入、设计大奖和新客户之外，专利和知识产权还可以作为一种衡量标准，进一步体现格芯在半导体行业和全球供应链中的重要作用。 他补充道：“新的专利和知识产权对于保护、维护和发展我们广泛的差异化平台、特性和专业应用解决方案至关重要。格芯非常关注差异化，我们的技术人员和发明者推出伟大的创新，并运用在知识产权管道中，以便我们能够加以保护，他们在这种差异化中发挥的作用十分显著。” 指导是关键 在阐述新思想如何演变为新发明之时，不乏各种名言妙语。托马斯·爱迪生(Thomas Edison)说：“在发明创造的过程中，最重要的品质是坚持。”与他同时代的尼古拉·特斯拉(Nicola Tesla)说：“独处是发明的秘方；独处是创意的摇篮。”他们下一代的发明者查尔斯·凯特林(Charles F. Kettering)则表示：“发明是大脑和材料的结合。” 今天，全世界的研究人员和商学院学生都在研究创新，关于如何充分营造一个让创新生根发芽、蓬勃发展的环境，相关理论比比皆是。显然，创新的秘诀还没有完全发掘出来。但是，在与各个领域的发明者（从经验丰富的专业人士到刚刚开始知识产权之旅的人）讨论这个主题时，他们都认为指导是一项关键因素。 格芯技术解决方案团队主管，即去年和Pandey一起被授予格芯“发明大师”称号的杰出技术人员Jack Pekarik的情况无疑就是如此。 “任何人都可以成为发明者，你只需要理解它的含义是什么，”Pekarik说，他在2015年作为公司收购IBM微电子业务的一部分加入格芯，现在常驻Fab 9。他早在1985年已加入IBM，但几年以后才开始IP 之路。 “我是一个大器晚成的人。我一直没有意识到保护我们的工作并申请专利的可能性和重要性，直到我的一个同事开始关照我，向我展示整个过程是如何运作的，”他说。 Pekarik在IBM的早期专利是一种新型的可编程存储器，这涉及到对SRAM单元施加过应力，使它始终能在两种不同状态中的一种状态下启动。他表示，在专利上看到自己的名字是一种自豪的象征，是继续发明创造的重要动力来源。 Pekarik给那些对专利感兴趣的人的建议是找到或组成一个发明小组，并确保该小组至少包括一名在专利申请过程方面有经验的成员。他表示，在格芯以及其他一些公司，不乏大量才华横溢、上进心强的技术专业人士，他们已经组成了很多这样的小组，并且志同道合的同事们也一直在建立新的小组。 “也许是一群人，每周或每隔一周开一次会，聚在一起讨论并选择一个发明领域。找到问题，寻找解决方案。阅读并讨论专利文献，一起构思灵感，”他说，“我就是在找到这样一个小组之后，才得以了解这个过程。” 在Pekarik看来，任何公司有志向的发明者的最大障碍都与政策或程序无关——“格芯使其变得容易，”他说。相反，主要门槛是各行各业中存在的一个普遍误解，即申请知识产权保护是一项艰巨的任务，需要超人的努力和决心。 “指导是消除这一误解的强大方式，使得这个过程没有那么神秘，”他说道，“指导也是一种让更多员工参与进来的一种方式，这些员工正在思考发明，并最终会为我们的公司带来越来越多宝贵的发明成果。” 动力和成功 同样在去年被授予“发明大师”称号的还有设备集成工程师Bipul Paul，他常驻Fab 8，在格芯工作将近十年。Paul拥有近30项授权专利，还有几项研究正在进行中，他是一名积极的导师、顾问和合作者。和Pandey、Pekarik一样，他也是格芯专利审查委员会的重要成员。 Paul将专利视为所从事工作的一个自然的、几乎不可避免的延伸。 “我认为这是与生俱来的，如果你反复做同一件事，自然就会开始思考是否有更好的方式来做。对于我们从事技术工作的人来说，这可能就是通往发明之路的第一步。你只要把问题想清楚。进行讨论。记录你的工作。向他人寻求帮助和指导。” Paul说，在格芯发明创造与在其他公司工作之间的一个重要区别是，他可以不受限制地与格芯公司不同团队和不同部门的同事交流。这种跨学科的思想交流是受到鼓励的，通常会产生意外的现成解决方案，而如果构想被隔离在单个学科的孤岛上，便不可能获得这样的启发。 Paul说道，许多发明者和有知识产权头脑的技术人员具有创新的内在动力，但也存在其他激励因素。创造专利当然对个人的职业生涯有好处，也能提高个人在公司和行业中的知名度。此外，格芯还为申请知识产权和专利提供财政激励，包括针对首次发明者以及被授予“发明大师”荣誉头衔的员工的具体激励措施。他表示，以后也可能会对专利收取版税。 他补充道，除了这些激励措施以外，在得知自己的创新将帮助格芯在市场上取得成功和发展时，还有一种巨大的成就感和自豪感。他表示，当发明成果应用到公司的差异化技术组合，以及应用到格芯提供给客户的晶圆中时，是特别有成就感的事情。 “公司拥有的知识产权资本越多，我们在市场上的地位就越稳固，越有保障，”Paul说，“帮助确保格芯取得成功，我们的知识产权受得保护，让我能够一直做我喜欢的事情。” 格芯即将宣布2020年度杰出“发明大师”的最新成员，敬请密切关注！
“Master Inventors” Driving Innovation and Differentiation at GLOBALFOUNDRIES May 21, 2020Elite program honors employees who are prolific inventors, mentors, and advisors By Michael Mullaney Shesh Mani Pandey has a clear memory of his first patent: a new method for manufacturing high-gain vertical bipolar junction transistors. The new method was perfectly compatible with CMOS process, and the resulting devices offered a significantly improved performance over those currently available. Though it was more than 20 years ago, Pandey has never forgotten the sense of accomplishment and pride upon seeing his name on the issued patent – as well as the congratulatory emails from his managers and company leadership. Beyond this elation of realizing his technical innovation, there was also a sense of relief, he said, of having successfully navigated the long, winding, and sometimes arcane path of preparing and filing a patent. “When I first started out, I was highly motivated to pursue patents, but I didn’t have the visibility of how to make it happen. When I got my first patent, I was so happy. It was really exciting for me, and I got a sense of, ‘Ok, I can do it,’ now that I had a better understanding of the process,” said Pandey, an engineer at GLOBALFOUNDRIES (GF) and a longtime technical leader on the company’s device team. Pandey’s passion for invention only intensified throughout his years at Chartered Semiconductor and GF, which acquired Chartered in 2009. Today, he holds more than 45 patents across a wide spectrum of technology related to semiconductor manufacturing. In addition to his own projects, he also spends time advising and mentoring inventive colleagues who are gathering momentum on their career paths and gearing up to file for their own first patents. For his dedication to innovation and broadening GF’s portfolio of intellectual property (IP), Pandey was one of 11 employees last year bestowed with GF’s coveted title of Master Inventor. The honor is reserved for colleagues with at least 20 issued U.S. patents and who have a demonstrated track record of technical accomplishments and IP asset creation. “GF makes it easy for inventors to file for IP,” said Pandey, who is based at GF’s Fab 8 in Malta, New York. “As a company, we engage and encourage employees to file. We encourage senior inventors to tutor or mentor others, and help them understand the value of pursuing inventions and IP. We are aligned on this, right up to senior leadership. Innovation is truly woven into our corporate culture.” GF Master Inventors Program Now in its third year, GF’s Master Inventor program is a powerful platform for honoring prolific employees as well as motivating other employees who may have been thinking about submitting their inventions for patenting, said David Cain, IP Legal Director for GF, who is based at the company’s Fab 9 near Burlington, Vermont. GF has so far recognized around 50 Master Inventors, who Cain said are “the shining stars of the company in terms of innovation … folks who have had amazing careers of inventing and patenting.” Along with inspiring and mentoring their colleagues, Master Inventors serve as advisors and are a resource for GF’s technology leaders and legal team on a range of technical, strategic, and IP topics. There are external benefits to GF’s Master Inventor program and culture of innovation, as well. Patents and IP can serve as a yardstick – beyond revenue, design wins, and new clients – which further showcases GF’s vital role in the semiconductor industry and global supply chain, Cain said. “New patents and IP are critical for protecting, maintaining, and growing our wide range of differentiated platforms, features, and specialized application solutions,” Cain said. “Differentiation is a huge focus here at GF, and our technologists and inventors play an oversized role in this differentiation by coming up with their great innovations and getting them into our IP pipeline so we can protect them.” Mentorship is Key There is no shortage of adages or quips concerning how new ideas blossom into inventions. Thomas Edison said “In working out an invention, the most important quality is persistence.” His contemporary Nicola Tesla posited, “Be alone, that is the secret of invention; be alone, that is when ideas are born.” A generation later, Charles F. Kettering said “Inventing is a combination of brains and materials.” Today, innovation is studied by researchers and business school students around the world, and theories abound on how to best cultivate an environment in which innovation can take root and flourish. Clearly the secret sauce of innovation has not yet been fully characterized. However, when discussing the topic with inventors of all stripes – from seasoned pros to those just starting on their IP journey – they agree that mentorship is a key ingredient. This was certainly the case for Jack Pekarik, a leader on the GF technology solutions team and a Distinguished Member of Technical Staff, who along with Pandey was last year named a GF Master Inventor. “Anyone can be an inventor, you just need to understand what it means,” said Pekarik, who joined GF in 2015 as part of the company’s acquisition of IBM’s microelectronics business, and today is based at Fab 9. He first started with IBM in 1985, but didn’t begin pursuing IP until several years later. “I was a bit of a late bloomer. It was only after one of my colleagues really took me under their wing, and showed me how the process works, that my eyes opened to the possibility – and the importance – of protecting and patenting our work,” he said. Among Pekarik’s early patents at IBM was a novel form of programmable memory, which involved overstressing an SRAM cell so that it would always power up in one of two different states. Seeing his name on the patent was a badge of pride, he said, and was a significant source of motivation to continue inventing. Pekarik’s advice for someone who has an interest in patents is to find or form an invention group, and to be sure the group includes at least one member who has experience with the process. Within GF and other companies with a large population of talented and highly motivated technology professionals, he said, many of these groups already exist and new ones are being created all the time by like-minded colleagues. “Maybe it’s a handful of people, meeting every week or other week, getting together to talk about and choose an area in which to invent something. To identify a problem and look for the solution. To read and discuss patent literature, and have some whiteboard time,” he said. “It was only after I found such a group, that I was able to get my head around the process.” In Pekarik’s view, the biggest roadblock for aspiring inventors at any company has nothing to do with policy or procedure – “GF makes it easy,” he said. Instead, the primary barrier to entry is a prevailing misconception across all industries that filing for IP protection is somehow a daunting task requiring superhuman effort and resolve. “Mentorship is a powerful way to dispel this, and to make it less of a mysterious process,” he said. “Mentorship is also a way to engage more employees who are thinking about inventing, and, ultimately, to generate more and more valuable invention disclosures for our company.” Motivation and Success Also named a Master Inventor last year was device integration engineer Bipul Paul, who is based at Fab 8 and is approaching his tenth year at GF. With nearly 30 issued patents of his own, and several more currently in the works, Paul is an active mentor, advisor, and collaborator. Like Pandey and Pekarik, he is a valued member of GF’s patent review board. Paul sees invention as a natural, almost inevitable, extension of being engaged in one’s work. “I think it’s inherent that if you do the same thing over and over, you’ll naturally start to think about whether there’s a better way of doing it. For those of us working in technology, this can be the first step on the path to an invention. You just have to think through the problem. Discuss it. Document your work. Ask for help and seek out guidance from others.” An important difference between inventing at GF and his experience at other companies, Paul said, is the unimpeded access to engage with colleagues on different teams and in different departments across GF. This interdisciplinary cross-pollination of ideas is encouraged, and often results in unexpected and out-of-the-box solutions that would likely not have been arrived at if ideation was sequestered to the silo of a single discipline. Many inventors and IP-minded technologists are intrinsically motivated to innovate, Paul said, but there are other motivating factors, as well. Generating patents is certainly beneficial to an individual’s career and raises one’s visibility within the company and industry. In addition, GF offers financial incentives for filing IP and having a patent, including specific incentives for first-time inventors as well as those awarded the coveted title of Master Inventor. Down the road, Paul said, a patent may also result in future royalties. Beyond these incentives, he said, there is also a great sense of accomplishment and pride in knowing his innovations are helping GF succeed and advance in the marketplace. It’s particularly rewarding, he said, when inventions make their way into the company’s portfolio of differentiated technologies and onto the wafers GF ships to clients. “The more IP capital the company has, the stronger and more defensible our position is in the marketplace,” Paul said. “Helping ensure GF is successful and our IP is well-protected allows me to keep doing what I like to do.” Keep an eye out for GF’s forthcoming announcement of its newest members to this distinguished group, the 2020 cohort of Master Inventors!
GlobalFoundries to Implement ITAR and Strict Security Assurances at its Advanced U.S. Semiconductor Manufacturing Facility May 20, 2020 Company’s most advanced facility to expand capability to support U.S. government defense technology development and manufacturing, while further easing U.S. dependence on overseas suppliers Santa Clara, Calif., May 20, 2020 – GlobalFoundries® (GF®), the world’s leading specialty foundry and the leading U.S. pure-play manufacturer of semiconductors, today announced plans to implement export control security measures at its most advanced manufacturing facility, Fab 8, in Malta, New York. GF will bring its Fab 8 facility into compliance with both the U.S. International Traffic in Arms Regulations (ITAR) standards and the Export Administration Regulations (EAR), making the company the most advanced ITAR foundry in the country. By taking this significant step, GF deepens its partnership with the U.S. Department of Defense (DoD) and the U.S. defense industrial base, and further supports ongoing development of new assurance approaches in support of national security objectives. These new control assurances, which will go into effect later this year, will make confidentiality and integrity protections available for defense-related applications, devices or components manufactured at GF’s Fab 8 facility. To date, GF has invested over $13 billion in Fab 8 and this is a significant step to serve the U.S. government and its technology needs for decades. Senate Democratic Leader Chuck Schumer commented, “I have always been a strong believer that the most secure way to manufacture semiconductor chips is to do so here in the U.S. I have also been a champion of GLOBALFOUNDRIES and applaud their efforts to provide ITAR and EAR compliant manufacturing to the U.S. Government. In partnership with GF, New York State leads the nation in secure semiconductor manufacturing.” “As a leading innovator and vital supplier of differentiated technologies, adding these capabilities enables GF to develop and manufacture secure solutions for the U.S. defense industrial base,” said Tom Caulfield, CEO of GLOBALFOUNDRIES. “GF is a longtime supplier of ITAR and highly restricted EAR microelectronics, and we stand ready to support the U.S.’s goal of achieving and sustaining a leadership position in semiconductor manufacturing. Today’s announcement strengthens our ability to partner with the industry and the U.S. government to ensure America has the manufacturing capability it needs to supply semiconductors to its most secure and sensitive industries.” As a longtime supplier of microelectronics to the DoD, GF is uniquely positioned to support secure government programs at its Trusted facilities — Fab 9 in Burlington, Vermont, and Fab 10 in East Fishkill, New York — while working with the DoD on next-generation assurance approaches at its Fab 8 facility in upstate New York. GF’s Fab 8 employs nearly 3,000 people and has the available infrastructure and floor space needed to take on the responsibility of an immediate secure manufacturing approach. GF’s global manufacturing footprint continues to be a key differentiator, as the only pure-play foundry with manufacturing in the U.S., Europe and Singapore offering the highest industry, client and government criteria for secure manufacturing through its GF Shield program. About GF GlobalFoundries (GF) is the world’s leading specialty foundry. GF delivers differentiated feature-rich solutions that enable its clients to develop innovative products for high-growth market segments. GF provides a broad range of platforms and features with a unique mix of design, development and fabrication services. With an at-scale manufacturing footprint spanning the U.S., Europe and Asia, GF has the flexibility and agility to meet the dynamic needs of clients across the globe. GF is owned by Mubadala Investment Company. For more information, visit www.globalfoundries.com. Contact Erica McGillGLOBALFOUNDRIES(518) 795-5240[email protected]
硅光：基于格芯RF工艺的光学与数字技术的融合 May 19, 2020格芯®（GLOBALFOUNDRIES®）与硅光初创公司Ayar Labs自2016年起一直在合作研发封装内光学互连单芯片解决方案 “在同一芯片上集成光子和RF CMOS电路讲求精妙的平衡。将其全部集成到硅片上，我们便可充分利用硅制造技术的规模、成本和工艺控制优势。”——格芯副总裁Anthony Yu 作者：Dave Lammers 格芯于2015年收购了IBM微电子业务，获得了大量宝贵的硅光(SiPh – Silicon Photonics)研发成果，这些成果现在将广泛应用于300mm晶圆产品。公司重要的合作伙伴Ayar Labs适时推出了单芯片硅光设计，这是一家位于加利福尼亚州的初创企业，他们的单芯片设计为封装到封装互连确立了全新的带宽、功耗和延迟基准。 格芯计算和有线基础架构业务部副总裁Anthony Yu表示，格芯获得了IBM的九年光子学研究成果，并实现了90nm工艺“产业化”，即90WG。他表示：“在菲什基尔的工厂，我们已经在300mm晶圆上实现了这一工艺的量产。格芯做的大量的工作不仅定位于可信任的制造服务提供商，也针对光传输器准备可批量生产的各种相关器件。” 多年来，位于佛蒙特州伯灵顿附近的格芯Fab 9一直在利用锗硅工艺(9HP)为光学收发器制造元件。这些解决方案（激光驱动器、跨阻放大器(TIA)和其他分立式元件）被数据中心和其他市场中的“可插拔”多芯片光模块所采用，以通过光纤链路实现服务器机架的中距离连接。 格芯的45CLO工艺是整合数字RF功能与所需的光学器件的硅光单芯片解决方案。（资料来源：格芯） 光学连接开始进入新的阶段，可插拔光学收发器将被取代。在新技术中，光子链路连接到同一封装中的高性能IC，同时借助外部激光器提供光源。该封装通过光纤连接到另一个采用光子链路的模块，从而形成封装到封装高速互连，同时大幅降低功耗。 MIPO（单芯片封装内光学）I/O将Ayar Labs的光电小芯片TeraPHY集成到多芯片封装(MCP)中。经过与格芯的多年合作，Ayar Labs现在已将MIPO I/O小芯片发展到工程采样阶段。硅光领域先锋企业英特尔是最早采用Ayar Labs解决方案的企业之一，最初的目标是将其FPGA（现场可编程门阵列）与其他模块集成。 Yu表示，虽然该领域不乏一些其他的初创公司，并且大型数据中心企业都在研发自己的设计，但Ayar Labs是“最早开始设计太比特(Terabit)级解决方案的公司之一。他们积极进取，合作意愿非常强烈。”他补充道，Ayar Labs的单片小芯片将成为“颠覆行业的产品”。 批量制造是打造高性价比光子解决方案的一个关键要素。（资料来源：Ayar Labs） 将光子功能集成到同一块芯片上作为电子控制电路是一项颇具趣味的挑战。芯片将电子接口、数字电路和高速模拟混合信号电路与光学元件组合在同一硅片上。“在同一芯片上集成光子和RF CMOS电路讲求精妙的平衡。将其全部集成到硅中，我们便可充分利用硅制造技术的规模、成本和工艺控制优势。”Yu继续补充道，格芯与Ayar Labs组建的团队密切关注封装、组装和测试的挑战。 转折点 Ayar Labs的联合创始人、总裁兼首席技术官Mark Wade称，公司于2015年成立，最初是由参与一个多院校协作光子项目的成员组成。2016年，该初创公司与格芯建立合作伙伴关系。Wade表示，“当时整个行业正处于一个转折点。大家都注意到了电子I/O自身的局限性，并预测就扩展电气互连而言，电子I/O已无计可施。”他补充道，112 Gbps或许是基于CMOS的Serdes连接的最终极限值。 Ayar Labs从零开始研究新的解决方案，希望借助光学来彻底解决芯片到芯片的带宽问题。与电气互连相比，光学互连不仅能耗低得多，而且可以大幅提高带宽并减少时延。采用光纤后，影响电气互连的距离/带宽的权衡问题将不再成为困扰。 [有关Ayar Labs解决方案的详细探讨，请参阅：光学I/O小芯片消除瓶颈，释放创新能力] Ayar Labs和格芯合力研发可进行批量制造的单芯片解决方案，以期缓解数据中心带宽日益捉襟见肘的境况。例如，机器学习在连接处理器和GPU以及高带宽内存时要求更高的芯片到芯片带宽。Wade指出，“数据中心需要将机器分布到不同的物理位置，并使用通过超高带宽互连接口连接起来的多个组件。他们想要设计新型系统架构，而使用目前和未来几代的I/O是无法实现的。” \ 45CLO工艺将赋能一流的光学和数字功能。（资料来源：格芯） RF CMOS优势 格芯与Ayar Labs合作发现了多种方法，能够针对光学结构和其他功能优化格芯的45 RF SOI工艺。这项曾专门为毫米波市场研发的技术经过改进，包含了光子功能，现在正用于构建原型。 Wade表示，RF SOI CMOS是一项“赋能技术，因为有了它，我们得以在同一个平面层中构建晶体管和光学器件。此外，SOI工艺也帮助实现了超快晶体管，速度超过了大多数先进工艺节点。它们的密度不同于先进（CMOS体硅）工艺节点。但就模拟性能以及Ft和Fmax速度而言，它们的表现优于目前用于数字芯片的先进FinFET节点。” Ayar Labs和格芯正在合作研发格芯的新一代硅光平台45CLO，Ayar Labs计划在其器件量产时使用这一平台。Wade表示：“我们正在与格芯合作开展多项工作，希望将试产阶段的基于45nm RF SOI上的工作成果结合格芯通过收购IBM研发部获得的一些技术和工艺，从而打造高度可靠、可生产的工艺以在45CLO平台中构建我们的解决方案。” 格芯副总裁Anthony Yu透露，公司的45CLO单芯片技术将在纽约州马耳他的8号晶圆厂生产，并计划于2021年下半年完成生产工艺认证。 Ayar Labs首席执行官Charlie Wuischpard于2018年11月加入Ayar Labs，此前曾就职于英特尔数据中心部门，担任副总裁兼总经理一职。他表示，45CLO工艺的一大优化在于锗模块，“它有助于提高性能，并能让我们构建真正高性能的光检测器。我们认为最终将实现一流的光电性能。” Wuischpard称，集成的光学互连技术能够在新系统架构中实现出色的功能。“我们仍处于在CPU封装内部构建光学I/O的早期阶段。我们需要考虑百万兆级以上的机器，并非现在的超级计算机，而是未来的超级计算机和人工智能系统。” 从A到B Moor Insights & Strategy咨询公司的创始人、总裁兼首席分析师Patrick Moorhead解释道：“要让人工智能和机器学习能够发挥作用，唯一的方法就是收集更多数据，然后将数据从A传输到B，并且整个过程必须非常快速。而在许多情况下，数据传输必须时延非常小。” 云游戏、机器人、外科手术机器人、CV2X车与车和车与网络的链接、智能制造、蜂窝网络和其他应用需要数据中心处理海量数据，同时要将功耗保持在控制水平内。“人们正在边缘侧产生大量数据。无论是受移动、物联网还是5G的推动，都将有海量数据节点，其中许多数据都将返回数据中心。”他补充道，“正是因为有了机器学习和人工智能，我们才能利用所有这些数据做有用的事情。” 芯片行业已经意识到摩尔定律正逐渐失效，因此正转向异构计算，并使用独创性的封装和芯片堆叠形式。事实会证明，硅光作为一种芯片互连方法，将会成为深受欢迎的选择。例如，相较于限制设计灵活性的硅通孔(TSV)，与高带宽内存或加速器建立光子链路将会更受青睐。 Moorhead表示：“硅光是实现芯片间通信的全新方式，它使用的光学链路性能相当于PCI Express卡或3D封装。如果产量适当，从长远来看，使用硅光实现片外加速将会降低成本。” 阅读Pat在《福布斯》上发表的近期文章，了解格芯如何悄然成为硅光领域的生力军。 包含TeraPhy小芯片的模块能以更快的速度和更低的功耗进行光学连接。（资料来源：Ayar Labs） 光学技术缓解带宽压力 The Linley Group首席分析师Bob Wheeler称，Ayar Labs的TeraPhy小芯片有10个光学端口，利用波分复用(WDM)增加单一光纤上的光学信号数量。 “这样就能在芯片表面的线性边缘封装大量带宽。总而言之，能够从[芯片]获得多少带宽将成为限制性因素，尤其是对于尝试传输数十太比特数据的以太网交换机而言。” Wheeler说道：“他们取得的成果在集成程度和WDM方面是非常独特的。他们如何实现，如何将小芯片的体积缩小到如此程度，得益于Ayar Labs针对调制器和检测器研发的专有技术，相较于传统的马赫-曾德尔调制器，它们相当紧凑。” 任何重大技术转型均非一朝一夕之功，Wheeler表示，应先从下一代以太网芯片入手运用光学I/O，继而再推进到高端处理器和ASIC。“当电子I/O逐渐失去发展潜力之时，光学I/O将成为唯一一种缓解部分带宽压力的技术。” 格芯副总裁Yu评论道，未来几年，硅光以及它所支持的芯片到芯片光学连接将继续推动平台创新和新型解决方案的开发。格芯具备精良的制造工艺和丰富的硅光专业知识，并且旗下45CLO单芯片工艺正处于良好的发展势头，公司有信心成为这一领域的行业领先企业。 Yu表示：“十几年来，人们一直在谈论推出硅光的话题。硅光价值何在，格芯有何优势，全赖于大规模制造才能得以体现。我们有能力使用300mm制造工艺，通过非常严格的工艺控制，将光学和硅功能融合到VLSI解决方案中。我们助力客户扩展解决方案，实现快速发展。” 单击此处进一步了解格芯如何在计算和有线基础设施中利用光的能量。
