What It Takes to be a Patent Leader

By: Gary Dagastine

GLOBALFOUNDRIES was recently ranked No. 10 on SIA’s list of the top U.S. corporate patent recipients for 2016. We’re proud of that ranking because it’s more than just a number, it’s proof that the contributions GF employees make every day really matter, both for our company and for the industry overall.

We wanted to understand what it takes to make such an achievement possible because technology development is at the heart what we do. GF is full of smart, talented people but of course we couldn’t talk with everyone, so instead we contacted some of GF’s top patent recipients to get their insights. Each is a GLOBALFOUNDRIES Master Inventor.

Mukta Farooq is the Team Leader for 7nm Chip-Package Interaction and Packaging Technology. A GLOBALFOUNDRIES Fellow with 190 issued patents, she also is an IEEE Fellow, and a Distinguished Lecturer of the IEEE Electron Devices Society. She was previously Lifetime Master Inventor and Member of the Academy of Technology at IBM. Her areas of focus encompass 2D, 2.5D, and 3D chip package interaction and interconnect technologies.

Anthony (Tony) Stamper is a Distinguished Member of the Technical Staff in Analog and Mixed-Signal Technology Development in Essex Junction. Also previously a Lifetime Master Inventor at IBM with more than 400 issued patents, his work has spanned pioneering processes and integration technologies such as low-temperature CVD dielectric development, low-k dielectrics, damascene copper wire integration and, more recently, state-of-the-art RF device design, process integration and program management.

Ruilong Xie is a Senior Member of the Technical Staff in Albany, working on advanced FinFET technology as part of the IBM Technology Development Alliance, where he is the lead FEOL integrator at the 5nm node. An IEEE Senior Member, he has more than 200 issued patents for his work with FinFETs and for other device types such as gate-all-around and vertical FETs. His published work has been cited more than 600 times worldwide.

GF: How do you look at the process of technology development?

Tony: The closer one is to state-of-the-art manufacturing development, the easier it is to exceed the thresholds for patent novelty and patent value. My work has focused on differentiated technologies that can lead to industry “firsts” and the generation of intellectual property and many patents that have great value. By differentiated technologies I don’t only mean simply trying to develop the fastest transistor, but also the development of new IC technologies for wiring performance, cost, yield, reliability, etc. – all the things which differentiate us from competitors and lead to success in the marketplace.

Mukta: Working in new areas of technology often means that things don’t work out initially, and that many attempts may be needed before something clicks. A case in point is 3D technology where copper Through-Silicon-Vias (TSVs) were integrated into 32 nm CMOS logic wafers. This endeavor had significant challenges early on. But, as we got deeper into the technology and gained understanding of the problems, we began to invent original, creative ways of getting around them, leading not only to the industry’s first 3D Cu TSV logic wafer, but also to intellectual property associated with it!

GF: In a company made up of incredibly smart and dedicated people, you are a leader in terms of issued patents. What has made this performance possible, and is there any advice you would like to give to others?

Ruilong: I’d like to thank all my managers and mentors who gave me the opportunity early on to work on almost all FEOL modules, which in turn enabled me to work with, and learn from, all module owners and other technology teams. These interactions helped me develop a good understanding of the big picture and also built a natural collaboration with many brilliant and talented people.

On a more personal level, a problem-solving frame of mind and persistence in thinking are essential. A positive attitude towards problems can help generating the creativity needed to solve the issues and problems we face. Very often, the best solution does not just come out immediately. Persistence in thinking, even in the background mode, allows the brain to process all related information and do divergent thinking. This usually leads to very good solutions after an incubation period.

Mukta: The advice I would give is that first you need to develop a level of expertise in a given field and become familiar with the existing art. After you gain familiarity, you can think of how to improve on existing structures and methods to deliver benefits. Once you have reached that level of knowledge, you can start inventing. Also, collaborating with others – especially those who may have different backgrounds – can result in unique approaches to solving technology problems.

Tony: Persistence, hard work, and teamwork. There is a mantra at work that there are no problems, just opportunities. From a patent perspective, problems are opportunities to author patents. Roughly half of the patents I have authored stemmed from the identification and solution of technical problems. Most of the patents I authored had multiple authors. Working in informal or formal patent development teams is invaluable.

GF: What does GLOBALFOUNDRIES do to encourage the pursuit of technical achievement?

Mukta: The race to get to the best technological solution is ever-present in semiconductor companies. While technologists will do the best they can, recognizing and rewarding innovation encourages out-of-the-box thinking. GF provides this encouragement with a rich patent awards program, and with the Master Inventor Program that serves to highlight and appreciate the innovators for their contributions to the company’s intellectual property.

Tony: GF encourages patent generation through its patent review boards and financial incentives. Having an algorithmic approach to fostering specific inventions helps foster innovation overall. In technology development, there typically are core teams of a few engineers focusing on certain problem areas. These core teams often set aside time regularly to meet and identify patent-able ideas. This openness to brainstorm and write patents fosters a creative environment at GLOBALFOUNDRIES.

Ruilong: GF has a learning-oriented culture which encourages new ideas and experimentation. Jobs are highly aligned with employee competencies, and usually there is a high degree of autonomy. Also, open communication among leaders and coworkers leads to mutual support. Here’s a recent example: In our 7nm development work, we encountered a big challenge in a module called the “gate cut.” To resolve the issue, we encouraged ideas from all resources. Very effective discussions were held between Albany and Malta, with experts from both sides who met, shared past learnings, and brainstormed together. In the end, almost every possible solution was generated. We carefully reviewed each one, ranked and prioritized the top ones to pursue in experiments, and several high-quality patents have also been filed.

GF: Thank you for sharing your thoughts and insights!

About Author

Gary Dagastine

Gary Dagastine

Gary Dagastine is a writer who has covered the semiconductor industry for EE Times, Electronics Weekly and many specialized media outlets. He is a contributing editor at Nanochip Fab Solutions magazine and also is the Director of Media Relations for the IEEE International Electron Devices Meeting (IEDM), the world’s most influential technology conference for semiconductors. He started in the industry at General Electric Co. where he provided communications support to GE’s power, analog and custom IC businesses. Gary is a graduate of Union College in Schenectady, New York,

 

Wafer Fab Management for Leadership: Dan Hutcheson Talks with Tom Caulfield

During an era when semiconductor manufacturing was shifting to Asia, GF chose to fight the tide and invest in America, building a fab in upstate New York. New York State was keen to participate, as they had already invested in the region with a vision of creating a new technology ecosystem as an engine for job creation. These investments have been critical to GF’s success.

Dan Hutcheson, a leading semiconductor industry analyst and CEO of VLSI Research, recently visited Fab 8 in Saratoga County, New York and spent a day touring the facility and engaging with various fab teams.  The day concluded with a conversation between Dan and Tom Caulfield, senior vice president and general manager of Fab 8.

In this interview, Dan examines the accomplishments of GF’s Fab 8—where first-time-right on 14nm semiconductor design tapeouts has become a rule of thumb—and the importance of human capital, the impact of teamwork, and how to inspire it are essential components for success. They also uncover what semiconductor fab management is all about, including the difficulties of bringing up a greenfield fab, how the IBM Microelectronics acquisition fits in, and the role that Sanjay Jha, GF’s CEO, has played in the turnaround.

In short, Dan sums it up best: “Fab 8 is not just another fab. It is an American manufacturing success story.”

晶圆厂管理层的领导力:Dan Hutcheson与Tom Caulfield谈话

在这个半导体制造业务转向亚洲的时代,格芯选择了逆流而上在美国进行投资,在纽约州北部建立晶圆厂。纽约州热衷于参与,因为他们已经在该地区进行了投资,以创造一个新的技术生态系统来创造更多的就业机会。这些投资对格芯的成功至关重要。

Dan Hutcheson是一位非常出色的半导体行业分析师,同时也是VLSI研究公司的首席执行。他最近访问了格芯位于纽约萨拉托加县的Fab 8晶圆厂,并花了一天的时间来参观该厂的设施,并接触了晶圆厂的各个团队。当天,Dan和Fab 8晶圆厂的高级副总裁兼总经理Tom Caulfield进行了一次访谈。

在这次访谈中,Dan回顾了格芯的Fab 8晶圆厂的成就。在这里,14nm半导体设计流片的“一次成功”成为了一个经验法则。他同时也谈到了人力资本的重要性、团队合作的影响、团队合作是如何成为成功的重要元素。他们还揭示了半导体晶圆厂的管理方式,包括建立一个晶圆厂所面临的困难;IBM微电子的合并以及适应;还有格芯的首席执行官Sanjay Jha在这一系列转变中所扮演的角色。

简而言之,Dan强调到:“Fab 8晶圆厂不仅仅是一个普通的晶圆厂,而是一个典型的美国制造业的成功故事。”

 

 

Fraunhofer IIS加入格芯的 FDXcelerator™项目程序以实现动态偏置IP

Erlangen, Germany: The Fraunhofer Institute for Integrated Circuits IIS, a leading applied research and development center for ASIC, system-on-chip (SoC), and IP, today announced that it will offer dynamic biasing IPs for advanced SoC designs in GLOBALFOUNDRIES’ 22FDX® technology. This new capability offers dynamic adaption of block level performance versus power consumption ratio to customize and optimize SoC and ASIC designs.

Fraunhofer IIS Joins GLOBALFOUNDRIES FDXcelerator™ Program to Enable Dynamic Biasing IPs

1.41 ‘Giga-Searches’ per Second?

By: Igor Arsovski

GLOBALFOUNDRIES’ Ternary Content Addressable Memory Core sets a new performance and density record enabling faster cloud and data center traffic.

Data centers, which are the engines of the Internet, are responsible for the vast amount of traffic that flows across the network. And, it’s no revelation; our digital universe and data center traffic will reach 10.4 zettabytes (ZB) by 2019, the equivalent to 144 trillion hours of streaming music. As apps and services become more data hungry, the higher the allowance for data traffic we’re going to need to feed them.

And, getting there will require innovative solutions – to improve scalability and achieve higher throughput with lower latency, data centers use Ternary Content Addressable memory (TCAM).  TCAM, an application specific memory, is designed to help data centers speed the search of large look-up tables.

GF recently introduced a new ASIC search architecture TCAM solution at the International Solid-State Circuits Conference in San Francisco. GF’s TCAM core demonstrated the highest published search rate of 1.4 billion searches per second core, while also achieving a record density of 2Mb/mm2. This is good news for data centers, which commonly use TCAM in applications such as pattern recognition, data compression, network security and packet forwarding.

Furthermore, GF’s TCAM design uses both proprietary architecture and circuits for power supply pre-conditioning that reduce power supply noise collapse by 50 percent, enabling a path to further performance and density scaling. These improvements are critical to enable faster data centers with larger network tables capable of handling the constantly increasing network traffic.

TCAMs are extremely complex memory designs, which is why GF’s expertise – more than 20 years of pushing the limits of TCAM design – has enabled us to deliver improved search throughput, high density, and low power consumption for our customers’ ASIC designs. Specifically, it may be our seven generations of embedded TCAM design, qualification and debug experience, with more than 50 ASICs with large TCAM content in production, that allowed us to provide the highest search-bandwidth (fastest) networking TCAM in the industry.

To learn more about GF’s ASIC solutions, download our ASIC FX-14 technology brief or contact a GF ASIC sales representative.

About Author

Igor Arsovski

Fellow, Essex Junction, VT

Igor Arsovski is a GLOBALFOUNDRIES Fellow in the ASIC IP Design Group in Essex Junction, Vermont. He is responsible for defining power performance and area targets for memory IP and leads TCAM architecture and circuit definition including high-performance SRAM design. His extended focus is energy efficient building blocks for Deep Learning, High-Reliability Automotive Electronics, and 2.5/3D Memory Integration.
Prior to joining GF in 2015, Igor was senior technical staff member in the IBM Microelectronics group.
Igor holds a Master’s degree from the University of Toronto. He is an author of 14 IEEE papers, and has over 80 issued or pending patents.

 

1.41“Giga-Searches”每秒?

格芯的三元内容可寻址内存核心在性能和密度方面创造了新的记录,可实现更快的云端和数据中心流量。

作为互联网引擎,数据中心负责着大量的网络流量。我们的数字宇宙和数据中心流量在2019年达到10.4千兆字节(ZB),相当于144万亿小时的流媒体音乐。随着应用和服务对数据愈发地苛求,我们需要更多的数据流量来满足需求。

而且,这将需要创新的解决方案 —为了提高可扩展性并在较低的延迟下实现更高的吞吐量,数据中心可以使用三元内容可寻址存储器(TCAM)。 TCAM是一种特定于应用程序的内存,旨在帮助数据中心加快搜索大型查询表的速度。

格芯近日在旧金山国际固态电路大会上推出了新的ASIC搜索架构TCAM解决方案。 格芯的TCAM核心展示了其每秒最高14亿次的核心搜索速度,同时在密度方面也创造了2Mb/mm2的记录。这对于数据中心来说是一个好消息,数据中心在模式识别,数据压缩,网络安全和数据包转发等应用中通常使用TCAM。

此外,格芯的TCAM设计使用专有架构和电路进行电源预调节,可以将电源噪声降低50%,从而实现进一步的性能和密度的缩放。特别是对于更快的数据中心、处理不断增加的网络流量更大的网络表,这些进步至关重要。

TCAM是非常复杂的内存设计,这就是为什么格芯的专长 — 超过20年来不断推动TCAM设计的极限 — 使我们能够为客户的ASIC设计提供更高的搜索吞吐量,高密度和低功耗。具体来说,这将可能是我们的第七代嵌入式TCAM设计,资质和调试经验,已有超过50个具有大量TCAM内容的ASIC正在制造。使我们能够提供行业中最高(最快)的搜索带宽网络TCAM。

要了解有关格芯 ASIC解决方案的更多信息,请下载我们的ASIC FX-14产品简介,或联系格芯ASIC销售代表。

Executive Perspective: 22FDX: Ramping New Silicon in Old Saxony

Our 300mm Fab 1 is in Dresden, in the region of Germany known as Saxony, or sometimes Old Saxony. It is quite a beautiful and tranquil area but don’t be fooled. Years ago Saxony was Germany’s leading industrial area, and more recently it is again achieving industrial prominence. GLOBALFOUNDRIES is one of the reasons why. Dresden is where we are ramping 22FDX®, our 22nm FD-SOI process, into volume production this year. 22FDX gives customers an exceptional balance of performance, power consumption and cost, making it ideal for mobile, automotive and IoT applications. I’ve been managing Fab 1 in Dresden since 2011 and the differences from then to now can hardly be overstated. When I got here our production capabilities, technical resources and mode of operation didn’t match our ambition. Today, Fab 1 is quite simply one of the best fabs in the entire world, and we have a superb staff of technical people, managers and operating personnel who are aligned on achieving world-class operational metrics and customer satisfaction.

GLOBALFOUNDRIES, Fab 1, in Dresden is Europe’s Largest 300mm Factory

This evolution has been driven by investment, by more efficient use of technology and by great execution. We have invested more than $12 billion in Fab 1 to date, giving us the capacity to ship 60,000 wafers per month. This quarter, Dresden shipped its one millionth wafer to a top-tier mobile customer. That is an outstanding achievement. Overall, we have shipped 2.8 million wafers from Fab 1 since 2010, the majority of which were fabricated with our advanced HKMG technology. We’ve been offering that technology longer than any other pure-play foundry. We are currently making further investments to grow production capacity by another 40% by 2020. Much of this investment is to support volume production of 22FDX, along with the next-generation 12FDX™ technology now under development. Customer tape-outs from the 12FDX process are expected by the  end of 2018. Our efficient use of technology is a great advantage when it comes to volume FDX™ production. More than 70% of the FDX process steps are copied from our already well-established 28nm HKMG process flow, making it easier, faster and less risky to achieve commercial production. Being a foundry, we understand that we have one more key item on our daily agenda (besides shipping wafers on time and in spec, as well as developing tomorrow’s technologies): enhance productivity while reducing cost. That is now part of our site DNA, and I am proud that in a site-wide effort we were able to take out $100 million (USD) cost in 2016 alone.

GLOBALFOUNDRIES: Clean room techs walk the bridge in Fab 1

With regard to execution, over the last five years we have placed a great focus on establishing the necessary systems, business processes and mindset to complement our state-of-the-art manufacturing plant. We have learned how to better control risk and costs while making process changes, which is critical to managing the ever-increasing complexity that comes with more customers, more products, and new processes such as FDX. It’s been an exciting journey, and the best is yet to come.

高层视角:22FDX®在德国萨克森州创造新型硅

我们在德累斯顿的300毫米1号晶圆厂位于德国的萨克森州,它通常被称为老萨克森。这是一个美丽而安静的地方,但是,多年前,多年前萨克森是德国的领先工业区。而最近它正再次被称为行业的热门地区,格芯正是这个现象背后的原因之一。

德累斯顿是我们今年将 22FDX®,即我们的 22纳米FD-SOI制程 转入批量生产。22FDX给客户带来性能、功耗和成本之间的卓越平衡,使它成为为移动、汽车和物联网应用的理想选择。

从2011年开始,我一直管理着德累斯顿的1号晶圆厂,着几年我们取得了长足的进步。当我刚来这里的时候,晶圆厂的产能、技术资源和运营模式都无法和我们的期望所匹配。如今,1号晶圆厂就是世界上最好的晶圆厂。我们拥有出色的技术人才、管理团队和运营控制者,我们齐心协力达成世界级的运营优势,满足客户的需求。

          累斯顿的格芯 1号晶圆厂,欧洲最大的300毫米工厂

进化来自于投资,更高效的科技,以及卓越的执行力。至今,我们已经为1号晶圆厂投入了超过120亿美金,让我们拥有了每月生产60,000片晶圆的产能。在这个季度,德累斯顿为顶尖的移动客户提供了它生产的第100万片晶圆,这是无与伦比的成就。总体来说,自2010年以来我们已为顾客提供了280万片晶圆,其中一大部分是使用我们的HKMG技术制造的。我们提供该技术的时间,比任何一家纯晶圆制造商都长。

我们现在正进一步进行投资,以期望在2020年前提高40%的产能。投资的一大部分将用于22FDX®的生产,配以正在开发的下一代12FDX™技术。客户在12FDX™制程上的首批产品将会在2018年末完成。

我们对于技术的高效运用使我们在批量FDX™生产上具有巨大优势。超过70%的制程步骤都来自于我们成熟的28纳米HKMG制造流程,这会更容易、更快且低风险的进行商业化量产。

作为一家晶圆厂,除了准时精确的交付晶圆产品,并开发新的技术以外,我们明白我们还有一项重要的任务:那就是增加产量和降低成本。而这已经融入到我们晶圆厂的基因里了,在2016年,我们在全厂范围内节省了1亿美金的成本,对此我倍感骄傲。

格芯:无尘室技术人员走过1号晶圆厂的通道

对于管理角度来看,在过去5年中,我们对建立必要的系统、商业流程和思维模式投入了大量的精力,以此来匹配我们最先进的制造能力。我们学会了如何在改进制程的同时,更好地控制风险和成本。这对管理一个组织是特别重要的,特别是当着个组织变得越来越复杂,拥有越来越多的客户和产品,并运用了新的诸如FD的新制程。

这是一段激动人心的过程,而最美好的部分还在前方。

FD-SOI Rises to the Challenge

In recent days, we have seen the world’s two largest chip manufacturers announce new low-power 22nm process technologies. We are pleased to see other manufacturers following our technology solution lead. Almost two years ago, we launched our 22FDX technology for wireless, battery-powered intelligent systems.

While others have been focused only on squeezing more digital performance out of the bleeding edge, we at GF have been focusing on system-level metrics with 22FDX. The 22nm node is now becoming one of the biggest battlegrounds in semiconductors, which demonstrates the unprecedented innovation that is taking place at advanced nodes that are one or two steps off of the leading edge.

We chose FD-SOI over bulk planar or FinFET because it offers the best combination of performance, power and area for these applications. 22FDX is unmatched by any competing 22nm technology in several areas:

  • The lowest operating voltage (0.4 volt)
  • The most cost-effective CPP and MX scaling
  • The lowest mask count
  • The best RF performance
  • The only technology to offer software-controlled transistor body-biasing

And while others are announcing their offerings now, 22FDX is fully qualified for production at our Fab 1 facility in Dresden, Germany. We are seeing strong customer demand, with more than 50 active engagements in high-growth areas such as mobile, IoT, and automotive.

Not only are we delivering 22FDX now, but we are investing for the future. In September of last year, we introduced an extension to our FDX roadmap with our next generation, the 12FDX platform, which is the only technology to provide the design flexibility and cost of a planar process down to 12nm, and yet offer 10nm FinFET-level performance. We expect others to follow our 12FDX lead!

We are also making significant capacity investments. In Germany, we are building up 22FDX capacity, with plans to grow the overall fab capacity by 40 percent by 2020. And in China, we recently announced a partnership to build a 300mm fab in Chengdu to support the growth of the Chinese semiconductor market and to meet accelerating global customer demand for 22FDX.

Last but not least, a robust design and IP ecosystem is coalescing around FDX. We recently launched our FDXcelerator™ Partner Program, which is designed to reduce time-to-market for customers and facilitate faster migration to FD-SOI from bulk nodes such as 40nm and 28nm. More than 20 partners have joined the ecosystem since its launch only six months ago.

Clearly excitement about FDX is rising and the competition is heating up. FD-SOI has long been considered the “technology of the future,” but now all of the puzzle pieces are coming together to make the promise of FD-SOI a reality TODAY.

 

About Author

Alain Mutricy

Alain Mutricy is the SVP, Product Management Group, at GLOBALFOUNDRIES. Assuming the role in 2016, he is responsible for leading the Product Management, Program Management, Strategic Marketing and Design Enablement organizations.

Alain is an accomplished senior executive with more than 25 years of experience in general business management and complex technology product line management in the consumer electronics, mobile, and semiconductor industries.

Prior to his current role, Alain served as Founder-Consultant, Executive Adviser, for AxINNOVACTION, a company that promotes action to unlock and accelerate innovation in big organizations and proposes a customized strategy framework to develop new products.

Alain has also held the roles of Co-Founder and CEO, at Vuezr, Inc.; Senior Vice President, Portfolio and Product Management, and Senior Vice President, Motorola Handsets Platform Technology, at Motorola Mobile Devices; and Vice President at Texas Instruments, leading the cellular chipsets and OMAP organizations.

Alain holds an MBA, Cum Laude, from the HEC Group in Paris, France, and a Masters Degree in Mechanical and Electrical Engineering from A&M Paris-Tech. Alain is also a founding member of the MIPI alliance, an early Director of Open Mobile Alliance, and was Board member of UIQ AB.