May 12, 2016By Joerg Winkler One of the essential building blocks of applications in mobile, pervasive and intelligent computing space is a high-performance, low-power processor. For these applications, GLOBALFOUNDRIES 22FDX® platform with 22nm fully depleted silicon-on-insulator (FD-SOI) technology offers an optimal combination of performance, low power and cost. One big advantage of 22FDX is the ability to optimize performance and power by applying forward and reverse body bias to the transistors. The challenge for our design team was to successfully apply body-bias to enhance PPA of a quad-core ARM Cortex-A17 processor implemented in 22FDX FD-SOI technology. In GF’s webinar, Implementing an ARM® Cortex®-A17 Processor in 22FDX Technology, we examine a digital implementation flow with industry-standard EDA tools, the application of body-bias for specific design intents and power scenarios, provide analysis of physical architecture details and initial PPA results of an ARM Cortex sub-module. The concept of an optimizable technology platform holds great potential, but adopting a new platform often means adopting a new design flow as well. And engineers know that with new design flows, the road from concept to reality can be bumpy unless the implementation details are well thought out. Fortunately, the GF 22FDX FD-SOI design flow is architected to be very similar to the existing bulk flow. With support from all of the major EDA vendors, the 22FDX flow uses various design techniques (implant-aware, source/drain-aware, double patterning, UPF support) which have been deployed on earlier nodes. This case uses the Cadence tool suite from initial design creation to signoff. We detail the implementation of an ARM Cortex processor as a reference design, highlighting how to obtain a wide range of PPA results by applying both forward and reverse body bias to different domains in a floorplan. With this easily tunable tradeoff, you can effectively balance between higher performance and lower power to meet the overall performance specs and power budget of a SoC design. GF design IP for the ARM Cortex-A17 processor includes standard cell base libraries, power management kit and cache memory kit, each with support for body-biasing. The 22FDX platform is ready to adopt for new designs, with the starter kit of 22FDX digital design flow available now. To replay the webinar, click here. More information including videos and white papers are available at GF.com/22FDX.
