By: Martin Mason

GF’s strategy is to deliver highly differentiated, high-added-value solutions for clients in high-growth markets, and a tangible result of that commitment is our 22nm FD-SOI (22FDX®) embedded MRAM non-volatile memory (NVM) technology, which has entered pilot production for several large IoT clients.

The embedded STT-MRAM (spin-transfer torque magnetoresistive RAM) technology, developed in partnership with Everspin Technologies, Inc., is aimed at IoT, general-purpose microcontrollers, automotive, edge AI and other applications where low-power operation and fast, robust, non-volatile code and data storage is a critical requirement.

GF’s eMRAM technology is unique in that it is a robust MRAM solution, having been designed as a high-volume embedded flash (eFlash) replacement. It has passed rigorous real-world production testing, and enables delivery of persistent data retention and endurance at extended temperatures. That is key for microcontroller applications and wireless connected IoT, where embedded memory must retain code and data at high temperatures, including through solder reflow at 260°C during PCB assembly. It also offers erase and (re)write speeds an order of magnitude faster than eFlash (200 nanoseconds vs. 10’s of microseconds), with comparable read speeds, providing a power advantage over eFlash in many applications.

Although it initially makes use of GF’s power-efficient 22FDX process, MRAM is deployed in ‘back-end-of-line’ metallization, which allows for a robust roadmap with planned derivatives on both FDX™ and GF’s FinFET technology. That’s because STT-MRAM as a memory technology allows for process variations which can be used to tune the memory bit cell. Accordingly, we expect to offer two “flavors” of eMRAM: eMRAM-F on 22FDX for code/data storage right now, and eMRAM-S as a working memory to augment SRAM at 1x nodes in the future.

GF is currently running multi-project wafers (MPWs) with 22FDX-based eMRAM-F designs for several clients, and multiple production tape-outs are scheduled in the next three quarters. Custom design services are available from GF and our design partners, and 22FDX eMRAM process design kits are available with macro densities ranging from 4Mb to 32Mb for individual macros. A 48Mb macro is scheduled for release in 4Q19 as well.

Industry is at a Transition Point

What’s driving great interest in alternative embedded NVM technologies at present is the fact that the industry is at a transition point: The 28nm node is possibly the last cost-effective node for eFlash, and the transition to 22nm geometries is making it imperative to find an alternative that is suitable for new and fast-growing low-power applications.

Many new eNVM memory technologies look interesting but aren’t yet production-ready. For example, RRAM (resistive RAM), which stores data by changing the electrical resistance of a dielectric, is the subject of much research and development but its maturity on 2x nm process nodes is limiting its adoption. Likewise adoption for PCM memory is limited by a lack of foundry support below 28nm.

By contrast, eMRAM from GF is an especially compelling and timely solution. Although the technology is complex and has required a significant investment of time and money to develop and deploy, it offers tremendous performance and versatility. In addition to the power benefits gained by combining the power-efficient base FDX silicon-on-insulator process with eMRAM, GF’s FDX process also has industry-leading RF connectivity capabilities, and extensive IP is available from GF. This all enables delivery of a unique high performance, high integration, low power and small size solution, which brings tremendous value to clients.

In fact, GF is on its third generation of MRAM technology with the 22nm eMRAM product, having also produced Everspin’s 256Mb 40nm and 1Gb 28nm standalone MRAM products as part of a joint development effort.

In addition to eMRAM technology, GF also offers clients eFlash and system-in-package flash (SIP Flash) embedded memories, built in a range of technologies from 130nm to 28nm to meet a broad swath of application requirements.

A Successful Strategy

The rollout of 22FDX eMRAM technology truly shows the success of GF’s efforts to intensify investment in areas where we have clear differentiation and where we can add great value for clients.

About Author

Martin Mason

Martin Mason is Sr. Director of Leading-Edge eNVM at GLOBALFOUNDRIES. Before joining the company, he was at Maxim Integrated Products in Executive Director roles for Core Products and Precision Conversion Solutions, and prior to that, he served in product marketing and design/application engineering positions at Atmel, Actel, Concurrent Logic and GEC Plessey Semiconductors. He is a graduate of University of Newcastle upon Tyne in England.

By: Peter A. Rabbeni

AI touches our lives in many different ways, and while some AI-enabled applications are highly visible, like the increasingly popular Amazon Echo and Google Home voice-controlled intelligent digital assistants, others are less obvious. But by no means are they less important.

For example, AI techniques are essential to the successful rollout of 5G wireless communications. 5G is the developing standard for ultra-fast, ultra-high-bandwidth, low-latency wireless communications systems and networks whose capabilities and performance will leapfrog that of existing technologies.

5G-level performance isn’t a luxury; it’s a capability the world critically needs because of the exploding deployment of wirelessly connected devices. A crushing amount of data is poised to overwhelm existing systems, and the amount of data that must be accessed, transmitted, stored and processed is growing fast.

5G Needed for the Upcoming Data Explosion

Every minute, by some estimates, users around the world send 18 million text messages and 187 million emails, watch 4.3 million YouTube videos and make 3.7 million Google search queries. In manufacturing, analysts predict the number of connected devices will double between 2017 and 2020. Overall, by 2021 internet traffic will amount to 3.3 zettabytes per year, with Wi-Fi and mobile devices accounting for 63% of that traffic (a zettabyte is 12 orders of magnitude larger than a gigabyte, or 1021 bytes).

The new 5G networks are needed to handle all of this data. The new networks will roll out in phases, with initial implementations leveraging the existing 4G LTE and unlicensed access infrastructure already in place. However, while these initial Phase 1 systems will support sub-6GHz applications and peak data rates >10GBps, things really begin to get interesting in Phase 2.

In Phase 2, millimeter-wave (mmWave) systems will be deployed enabling applications requiring ultra-low latency, high security, and very high cell edge data rates. (The “edge” refers to the point where a device connects to a network. If a device can do more data processing and storage at the edge – that is, without having to send data back and forth across a network to the cloud or to a data center – then it can respond more quickly and space on the network will be freed up.)

AI and 5G are Perfect Partners

AI functionality is key to edge computing because it provides for more effective control of networks, cells and devices. Without it, many 5G applications that rely on edge computing simply couldn’t be implemented, wouldn’t work well, or would cost too much to deploy.

Take the case of adaptive beamforming, where signals from phased array antennas are combined in ways that increase signal strength in a given direction. It’s important for 5G applications because while spectrum availability in the mmWave frequency range (30GHz – 300GHz) is nearly infinite, signals in these wavelengths are attenuated by atmospheric absorption which limits their usable range to about 300 meters. They also have difficulty penetrating buildings and foliage.

In the past, systems leveraging mmWave frequencies were built accepting these limitations, but that also limited their application. The control of adaptive beam-forming antenna arrays used for mmWave 5G communications is critical to optimizing their operation and performance, and so with the advancement of semiconductors and faster digital signal processing, sensing systems combined with AI can be used to control them. This will lead to dynamically optimized base stations and computing resources which better accommodate changing user needs and environmental conditions. Without AI, this would be much harder to achieve.

Smart Surveillance Cameras

Another way in which AI conserves network resources is its role in the growing use of “smart” surveillance cameras, which make use of diverse semiconductor technologies. More than 120 million IP (internet protocol) cameras were connected to networks globally in 2016, for use in a wide range of applications.

Many of these are so-called “smart” surveillance cameras. (In one notable instance recently, smart surveillance technology enabled police to pick out a wanted man among a crowd of 60,000 concert-goers.)

Without AI to enable edge processing of most of the data generated by a smart camera, though, networks would be overloaded. A single high-definition IP smart camera generates a video stream of 10Mb of data (or 30 frames) per second. Multiply that by the millions of such cameras added in recent years, and the network bandwidth required just for this application would be over a petabyte per second (1015) ─ clearly impractical.

AI to the Rescue at the Edge

Moreover, processing this data in the cloud would be hugely expensive with current technologies. The only real answer is to compute at the edge, using AI techniques for object recognition, gesture detection and classification, and only send minimal metadata over the network.

One might think that the most advanced, leading-edge semiconductor technologies are required to do this, but in fact a number of processes come into play. GF offers the industry’s broadest set of technology solutions for a range of 5G and edge-connected applications, including mmWave front end modules (FEMs), standalone or integrated mmWave transceivers and baseband chips, and high-performance application processors for mobile and networking.

For example, GF’s RF SOI, SiGe and FDX™ FD-SOI offerings are designed to serve applications ranging from sub-6GHz to mmWave frequency bands. RF SOI and SiGe solutions deliver an optimal combination of performance, integration and power efficiency for FEMs with integrated switches, low noise amplifiers and power amplifier applications. FDX offerings are well-suited for the next generation of connected devices such as smart cameras which require ultra-low power technology with intelligence and wireless connectivity built in.

Clients can take advantage of the back gate body-biasing capability of FDX that can be used to dynamically increase performance when needed for image processing, AI/Machine learning, or controlling leakage when a system is in standby. The FDX ecosystem of IP partners includes optimized IP for on-chip  power management, radio sub-systems, low voltage SRAM, instant-on MRAM, eNVM and FPGA blocks for the highly integrated flexible systems-on-chips (SoCs) needed for AI-enabled edge computing.

Connected Intelligence

Traditionally, the industry has viewed networks non-holistically, on a transactional basis and from the separate and distinct viewpoints of computation, storage and data transport.

But if we now think about adding many edge-connected devices with sensor collection capabilities to the network, we begin to see the value of creating networks with smart sensing capabilities, whose data can be collected and become the basis for intelligent and time-based decisions that improve and optimize the services provided by the network.

This is what we mean by Connected Intelligence – the ability to sense, decide and act upon information collected from devices/sensors connected to the network to create the ultimate user experience.

The addition of AI engines to augment this “sense, decide and act” approach to network optimization can create a very powerful framework to best leverage available network assets.

Underneath it all is the realization that AI-enabled 5G mmWave networks will depend on the advancements and innovation in semiconductor technologies. No single technology solution will serve all potential applications. It’s going to require a range of technologies to make these next-generation applications work together seamlessly and maximize their potential.

GF is working closely with clients to understand their needs in this space, and is leading the industry with our portfolio optimized to help meet the demands of AI at the edge.

By: Dave Lammers

When journalists think about how semiconductor companies compare, we often drill down into gate lengths, mask layers, SRAM cell sizes, and other hardware-oriented metrics. It was only midway through my own career that I started to realize that intellectual property (IP) and other forms of design support were just as important to the success of both foundries and integrated device manufacturers (IDMs).

When GF announced its “pivot” in late August 2018, much of the public attention again went to the role of the transistors, and how resources could be redeployed into other than 7nm logic. And yes, spreading those efforts out over the 18 different technologies (and sub-variants) offered by GF has received a fair amount of understanding in the era of a slowing Moore’s Law.

What needs a bit more emphasis is the renewed push on intellectual property (IP), in part made possible by the pivot.

Mark Ireland, vice president of ecosystem partnerships GLOBALFOUNDRIES, said the 12LP (FinFET) process is a good example of redeploying IP resources. In its initial phase, GF’s 12LP process was used primarily for CPUs, GPUs, and similar high-performance products. Now, 12LP is going into a broader set of markets, including consumer, networking, 5G wireless, and artificial intelligence-machine learning (AI-ML). These often require different IP, notably multi-protocol SERDES, low-power memories, and high-speed memory interfaces.

“In consumer, digital video and set top boxes are moving into FinFETs. Consumer did not lead that (12LP) node, but now it is moving into FinFETs. We are seeing a much broader set of markets and a broader set of customers, and that has to be reflected in the focus of our IP partnerships,” Ireland said.

Artificial intelligence SoCs also need additional IP, including high-speed SERDES and low-power memories, he said.

High-Speed SERDES for 5G Base Stations

Similarly, the 5G wireless standard “has broadened the need to bring in some high-speed SERDES IP that will be used in 5G base stations and elsewhere. That is the kind of IP that our customers need to be successful in these markets,” he said, noting that wireless customers can opt for the 22FDX fully-depleted silicon-on-insulator, 12LP FinFET, or other processes, depending on their application needs.

GF and Rambus announced 28-Gbps and 32-Gbps SERDES for the 22FDX process, and just prior to the Design Automation Conference, GF and Synopsys said they were readying a 25-Gbps SERDES on the 12LP process. “While it has broader market applications, this is the kind of IP that is very critical for 5G base stations,” Ireland said.

Also, GF and Analog Bits recently struck a deal to bring Analog Bits’ analog and mixed-signal IP design kits to the 12LP technology, including low-power phase-lock loop (PLLs) with spread spectrum clock generation (SSCG), process, voltage, and temperature (PVT) sensor IP, and others.

“We are developing deeper partnerships across a broader set of markets to meet the need for more IP. We are driving the process, and there is no lack of opportunity. The challenge in front of GF is to get the highest quality IP in place on time and on schedule,” Ireland said.

A Radio On Every Chip

Subi Kengeri, vice president of client solutions at GLOBALFOUNDRIES, said rather than rely on brute scaling, more IC design teams are pursuing complex designs with RF and mixed-signal either using FD-SOI or a traditional heterogenous integration approach. For complex RF and Analog SoCs, Kengeri said “the IP is the carrier of technology differentiation to the SoC. It is how designers extract the differentiated value of the technology. So it becomes important that the IP is fully optimized and has the highest quality.”

GF has a strong track record in RF technology, and keeping investments strong in RF IP is part of the post-pivot strategy. “Communication is becoming more important than ever, and every chip will have a radio in it. RF is very complex and the skill set is limited throughout the industry. We are no. 1 in the RF world, and by having invested in that IP, design services and RF reference blocks, we are well positioned to give our customers faster time-to-market and lower costs, with least risk. Think RF. Think GF.”

Tracking IP Readiness

John Kent, vice president of foundry IP and customer engineering, said a chip design may require 20 or more different IP titles. “We track IP readiness, and by that I mean when a customer wants to do a design, do we have all the IP necessary?” Kent said. That readiness metric is a “critical indicator that we are able to service a customer.” Another important metric, Kent said, is first-time-right, making sure all of the IP’s DC parametrics are accurate.

“Our on-the-ground experience with new customers tells us where we are world class, and where we have work to do. The biggest challenge we have as a team is balancing our resources as we redeploy off of seven nanometers, using some of the experience the team developed at 7nm on other platforms,” he said.

Kent said other GF technology platforms have received more attention, including an ongoing focus on improving the PDKs (product development kits). “Our PDK learning has been a work in progress over the last ten years as we have learned to execute in a timely fashion. With that process, and then the pivot, we were able to shift the primary PDK development focus from just FDX and FinFET to some of the other 18 families that GF provides its customers, redeploying much of our PDK resources across those technologies,” Kent said.

For the 22FDX foundational IP, GF has relied primarily – but not exclusively – on Invecas, which includes former members of the IBM memory IP team. Kent said of Invecas, “It’s a great team and produces great products.”

“Our base 22FDX foundation IP is from Invecas, and recently we have expanded our ecosystem to include automotive IP from Synopsys. It is our intention to work with multiple suppliers,” Ireland said. The deal with Synopsys includes foundation IP as well as analog and interface IP targeted to automotive applications such as ADAS, powertrain, 5G, and radar.

Foundation IP Can Be Complicated

Foundational IP, or FIP, can range from simple to moderate complexity. General purpose IO with multiple voltages can involve several different metal stacks and can be quite a complex design. “Typically when we release a library there are several thousand individual library cells composed within the FIP,” Kent said.

Memories, including Static RAMs, ROM, flash, and more recently MRAM, are included as FIP because, like I/O, they are foundational to a design. But memory IP is complicated, with sophisticated signaling problems and error correction.

So-called complex IP often has a significant amount of analog and mixed-signal content. A 32-Gbps SERDES can have many digital-mode functions, as well as complex mixed-signal to support signal and power parameters.

GF has been working with Everspin to develop new IP supporting the embedded MRAM for both the 22FDX and FinFET-based processes. Kent said MRAM has advantages over flash, including sub-nanosecond write times, (compared to milliseconds for flash), and very strong failure resistance. “We are developing new IP (to support MRAM), including classes of performance which mimic SRAM,” Kent said.

Automotive applications are a prime target for MRAM. “The automobile of the future will be covered with sensors, and everything has to run safely. MRAM is being contemplated because the ICs have to run longer in a car than, say, a computer is expected to last,” Kent said.

About Author

Dave Lammers

Dave Lammers is a contributing writer for Solid State Technology and a contributing blogger for GF’s Foundry Files. Dave started writing about the semiconductor industry while working at the Associated Press Tokyo bureau in the early 1980s, a time of rapid growth for the industry. He joined E.E. Times in 1985, covering Japan, Korea, and Taiwan for the next 14 years while based in Tokyo. In 1998 Dave, his wife Mieko, and their four children moved to Austin to set up a Texas bureau for E.E. Times. A graduate of the University of Notre Dame, Dave received a master’s in journalism at the University of Missouri School of Journalism.