By: Dave Lammers

Using GF’s 45RFSOI technology, UCSD Prof. Peter Asbeck recently developed a power amplifier operating at 28 GHz with output power of 22dBm and more than 40 percent power-added efficiency (PAE).  When backed off for the 64QAM OFDM signals used in 5G, the amplifier achieves an average output power of 13 dBm at 10 dB backoff, with 17 percent PAE, even without digital predistortion.“This is the right level of power and efficiency for the majority of the 5G 28 GHz applications,” Asbeck said.

Power amplifiers (PAs) are a different breed of cat from most other chips, and the PAs needed for the 5G wireless solutions are likely to be much different than those used in today’s 4G smart phones and base stations. Most 5G wireless applications will use phased array antennas to focus and steer multiple beams, and it is this ability to divide the transmission task among multiple beams, which gives 5G the ability to achieve what, to many, seem improbable performance targets.

While early 5G systems will use the sub-6 GHz frequency range, the real promise of 5G comes from using bandwidth in the 24, 28, and 39 GHz millimeter-wave ranges. There, phased array antennas, such as a 4×4 array, will be deployed, with each PA operating at much lower power than those needed to amplify the single-beam, omnidirectional signals used now.

Peter Asbeck, Professor at USC

Ned Cahoon, RF business development director at GF, said in the 4G wireless generation, gallium arsenide (GaAs) has been a leading technology in the power amplifier sector. “We believe we are moving from a sub-6-GHz regime, where gallium arsenide has dominated, to the millimeter-wave market, where most front-end solutions will be in silicon.”

Already pervasive in handset switches and antenna tuners, Cahoon said RF SOI technology – in production for over a decade and now extended by GF to 300mm diameter wafers at the 45nm node – is ideal for the integrated front-end devices needed for the millimeter-wave 5G handsets, access points, and base stations.

Cahoon bases that belief partly on work being done by several of the key professors working in the power amplifier field, notably Peter Asbeck at the University of California at San Diego (UCSD). Asbeck earned his doctorate at M.I.T., spent 15 years in industry developing high-frequency wireless technologies, and became the Skyworks Professor in High Performance Communications Devices and Circuits at UCSD’s Jacobs School of Engineering, and is a Member of the National Academy of Engineering for his development of the GaAs HBT device.

State of the Art

Using GF’s 45RFSOI technology, Asbeck recently developed power amplifiers operating at 28 GHz that can provide up to 22dBm output power and peak PAE of more than 40%. In a 5G application, the transmitted waveform requires substantial backoff from peak power, and excellent linearity.  The 45RFSOI circuit provides an average output power of 13 dBm, with 17 percent backoff PAE for the 5G case. “This is the right level of power and efficiency for the majority of the 5G 28 GHz applications,” Asbeck said, adding that the PA was used to transmit the standard 64 QAM OFDM signals, without using expensive digital pre-distortion (DPD) filtering techniques. While noting that other research labs are approaching similar results, he described his lab’s 45RFSOI-based power amplifier as “pretty much state-of-the-art.”

“There is really intense competition now between different technologies for the emerging 5G system slots.  45RFSOI is very close to being the ideal technology for configuring the RF front-end modules for 5G at 28 and 39 GHz. I think it is likely to emerge as the winner for very many 5G systems,” Asbeck said.

That statement is particularly interesting because during his career much of Asbeck’s work has been in gallium arsenide (GaAs), which is able to support the high voltages required for power amplifiers more easily. Since moving to UCSD in 1991, Asbeck has pioneered the ability to put silicon-based transistors in a series to achieve higher voltages, with these “stacked” transistors together providing the required output power. Four transistors in a serial arrangement are sufficient to produce the voltages required for most PA’s, he said. (Cahoon said, simply put, RF power equals the voltage times the current, with higher voltages needed for optimal linear circuits; basically the opposite of digital ICs.)

Asbeck is quick to note there are competing technologies to 45RFSOI, including gallium arsenide (GaAs), gallium nitride (GaN), and silicon germanium (SiGe). Another contender is the 22FDX® technology from GF. In a Foundry File blog last year, another professor at UCSD, Gabriel Rebeiz, described the work he is doing to develop low-noise amplifiers (LNAs) in the 22FDX technology.

Rebeiz, in an interview, said he believes the power levels in 22FDX-based amplifiers can be increased so that integrated 5G front-end solutions can be developed. But Rebeiz tipped his hat toward Asbeck’s work in 45RFSOI, saying “it is essential that the functions be integrated together, without that you do not have a (marketable) part. With RF SOI, besides the stacked-transistor PAs, you can also stack the switches. My group, together with GF, has shown 45RFSOI-based switches with only 0.8 dB of insertion loss. So yes, 45RFSOI is an ideal front-end-module technology.”

Besides the power amplifiers, RF front-end solutions need to integrate the low-noise amplifiers and switches, as well as phase shifters and variable gain amplifiers. RF SOI, Asbeck said, has proven to be “the world’s best approach” for millimeter-wave switches, which “outshine” switches available in SiGe HBT or GaAs technologies.

“There are some applications in 5G, to be sure, that require higher output power than has been demonstrated so far in 45RFSOI. The first generation 5G deployments may employ PAs in other technologies such as SiGe HBT or GaAs or GaN.  But we think there is a great opportunity to further increase the output power achievable with 45RFSOI into the Watt range for peak power, and to take over these slots as well as the lower-power ones,” he said.

Minimizing Parasitics

What gives RF SOI an edge? Asbeck said to reach the required levels of output power, transistor stacking “needs to be done – that is, placing a number of FETs in series, so that the overall voltage handling is increased.” The silicon-on-insulator structure of 45RFSOI removes all the parasitics associated with body-effect and substrate capacitance that hamper circuits made in bulk-CMOS.

Also, 45RFSOI has a high-resistivity substrate that “minimizes the capacitances of interconnects as well as of the devices. The three thick metal layers make the losses of matching networks the lowest of pretty much any IC technology. And the high Ft and Fmax values provide lots of gain at 28 GHz,” he said.

Battery life, so important in handsets, relates to the efficiency of the power amplifiers. Asbeck said, “45RFSOI ​has exceptional efficiency for the 28 GHz amplifiers, and it is pretty close to the best achieved in GaAs or GaN. I think that the high substrate resistivity and thick metals by themselves add about 5 percent to the PAE (power added efficiency) of the 28 GHz power amplifiers that we have made. Our record is 47 percent PAE, with saturated output power of 19.5 dBm in a simple 2-stack PA. A couple of other laboratories are reporting PAEs in this range too, using 45RFSOI.”

Cahoon said Asbeck’s 45RFSOI work has demonstrated the value of high-speed pFETs, along with the nFETs. Asbeck said the fast pFETs will enable the use of complementary circuits, with the pFETs improving the AM-PM characteristics of mostly nFET circuits. “We are also optimistic about mostly pFET circuits, because these transistors actually have potentially even better voltage handling than the nFETs,” he said. (The AM-PM conversion of an amplifier is a measure of the amount of undesired phase deviation (PM) that is caused by amplitude variations (AM) inherent in the system.)

For me, I took away two thoughts. One is that GF’s “pivot” away from leading-edge bulk CMOS in order to support technologies such as RF SOI was a smart move.

And listening to Asbeck, Cahoon and Rebeiz, one senses a confidence that millimeter-wave 5G wireless is readily achievable, providing the world with unbelievably fast wireless connections based on affordable, highly integrated ICs.

About Author

Dave Lammers

Dave Lammers is a contributing writer for Solid State Technology and a contributing blogger for GF’s Foundry Files. Dave started writing about the semiconductor industry while working at the Associated Press Tokyo bureau in the early 1980s, a time of rapid growth for the industry. He joined E.E. Times in 1985, covering Japan, Korea, and Taiwan for the next 14 years while based in Tokyo. In 1998 Dave, his wife Mieko, and their four children moved to Austin to set up a Texas bureau for E.E. Times. A graduate of the University of Notre Dame, Dave received a master’s in journalism at the University of Missouri School of Journalism.

By: Dave Lammers

With decades of development behind it, embedded STT-MRAM is coming to market, replacing embedded NOR flash, which has run out of steam at the post-28nm nodes due to power, mask-complexity, and bit-cell-scaling issues.

I’ve been to many IEDM conferences where companies went head-to-head in the logic arena; for example, Intel versus IBM in microprocessor logic. The 64th International Electron Devices Meeting, held in San Francisco in early December, was memory centric, as engineers from GLOBALFOUNDRIES and several other companies discussed their embedded MRAM programs at the IEDM podiums.

Just about all new technologies present themselves, and then face years of “crossing the chasm,” proving out reliability and gaining customer acceptance, said Tom Coughlin, president of data storage consultancy Coughlin Associates, referencing the 1991 book by Geoffrey Moore.

“Not depending on Moore’s Law scaling has liberated the industry,” Coughlin said. “We are getting away from the traditional ways that we build chips, turning to chiplets. And we can’t crank the traditional memories the way we used to.”

Embedded MRAM is a prime example of the industry’s creativity. With decades of development behind it, MRAM finally is coming to markets as a flash replacement technology. GF has a lead in the MRAM arena, said Kangho (Ken) Lee, the MRAM device lead at GF Singapore, as a result of the technology and manufacturing experience gained from a joint development agreement with STT-MRAM manufacturing partner, Everspin Technologies (Chandler, Ariz.).

Ready to Go

At IEDM in early December I met with Lee and his colleague, reliability engineer Lim Jia Hao, and asked: Is MRAM ready to go for NOR eFlash replacement?

“We have been doing production for Everspin, and that is absolutely helping. Our embedded MRAM is getting ready for production. We are qualifying our process now and this is going to be done soon. NOR flash replacement is very possible. Technologically there is no barrier,” Lee said.

In his IEDM presentation, entitled a “22-nm FD-SOI Embedded MRAM Technology for Low-Power Automotive-Grade-1 MCU Applications,” Lee detailed the work being done to meet the stringent requirements of the automotive market, where an embedded memory must be able to withstand operating temperatures as low as minus 40 degrees C and up to 150 degrees C.

“What we are talking about at this IEDM is our MRAM for automotive-grade applications. To date, no company has shown macro-level data at this temperature range, especially at 150 degrees C. We are showing the feasibility of an automotive MRAM, and that is very important to enable embedded STT-MRAM as a non-volatile-memory platform in the future,” Lee said.

In particular, the GF eMRAM showed a sub-ppm bit-error rate (BER) and superb reliability. “There are many MRAM applications and we have a technology platform that can serve many applications. ADAS (Advanced Driver-Assistance Systems) could be a very important one. One of the challenges is to get up to the 150 degrees C read margin. MRAM, because of its device properties, loses read margin at higher temperatures,” Lee said.

A Path Toward Automotive Qualification

Martin Mason, senior director of embedded memory, said GF is actively engaging with customers, working on new designs with embedded MRAM on the 22FDX® platform. Multiple production tape outs are scheduled for 2019.

The IoT and other low-power-centric designs will come first, followed by automotive-use SoCs in 2020. Mason said “a significant fraction” of GF’s existing customers are producing complex automotive-use microcontrollers. Mason said getting MRAM through the automotive qualification process is critical for GF and the automotive industry for their future product roadmaps.

“There are no  major blocks to prevent us from meeting the requirements of our automotive clients. We are talking to them about being qualified in the second half of 2020. We see a roadmap and a path to get there, and that’s what is important. We now have the (eMRAM) macros and are working with customers on new designs to characterize what we have at hand. Do we believe we can meet the specs? The simple answer is ‘yes, with a little engineering,’” Mason said.

Jim Handy, a memory analyst at Objective Analysis, said consumer devices, such as a heart monitor, rarely go much above a human’s body temperature. But an engine or transmission controller must operate in all kinds of temperatures, both high and low, which Handy said is “setting a hard goal” for eMRAM. But the customers need it; there is no NOR flash alternative past 28 nanometers.

“MRAM may be attractive at leading-edge nodes, not only for the high-complexity MCUs such as the engine and transmission controllers, but perhaps also for the entertainment system, which is not a life-and-death system,” Handy said, adding that most of the more than 100 MCUs in a modern car will continue to use NOR flash on somewhat older process nodes.

Saving EV Battery Power

Coughlin said as ADAS-enabled cars powered by batteries come to the market, carmakers are searching for high-complexity MCUs that do not consume a lot of power and can withstand high temperatures. “ADAS Level 4 is being targeted now, and that is a very complex system. With high transistor counts on those MCUs, companies need to put those designs on a leading-edge technology, and the eMRAM to support it is right on the doorstep,” Coughlin said, adding that “the biggest problem is that MRAM is new and the industry doesn’t have as much experience making it, especially for the higher temperatures.”

Mason said GF’s automotive customers need the 22FDX with eMRAM not only for engine and transmission control, but for other processors exposed to high temperatures. MCUs exposed to heat in the dashboard, in ADAS RF-Radar and LIDAR systems or in cameras mounted on front or rear car windscreens – all of which are exposed to demanding thermal conditions.

Different Interfaces, Side by Side

Mason described a capability unique to GF: putting a NOR-flash replacement eMRAM macro on a die with another, smaller eMRAM macro with an SRAM-type interface. These pre-built and verified eMRAM macros can be dropped into 22FDX designs. There are now 32- and 16- Mbit macros built with a single magnetic tunnel junction (MTJ) bit cell and a NOR flash-type interface with a 4-Mbit macro is planned for the first half of 2019. The 2-Mbit macro with an SRAM-like interface uses two MTJs for each bit cell to improve the read and write speeds.

Using the same underlying MTJs but with different sense amps, the flash-type macro has an interface for code storage, while the SRAM-type macro resides on the same chip for a persistent working class memory, providing a complete system within a microcontroller.

“A number of customers use both macros in their designs. Using MRAM doesn’t give much of a density savings compared with SRAM at 22nm, but they told us ‘that doesn’t matter, it is really about power.’ In many of these portable applications, power is what is critical. Clients really love to exploit the persistence for the power savings inside the chip, having the ability to be completely static, support fast start-up from power down and retain data values,” Mason said.

Handy, a memory designer early in his career, said for several decades people have written code for separate ROM and SRAM functions, in much different (flash and SRAM) transistors. “At some point people will get the brilliant idea to put the SRAM function in the MRAM, and then people will start changing the way they write their code. But people have become comfortable writing code the same way for three decades, and it will take time to fall into place,” he said.

Handy said the MRAM bit cell is fairly small if it is built in the lower metal layers with smaller pitches. There, MRAM can have roughly half the bit cell area compared with an SRAM cache, providing die size savings. But in the higher metal layers, the MRAM and SRAM sizes are similar.

Mason said GF is working with many customers, running multi-project wafers (MPWs) with eMRAM on 22FDX®-based designs. Embedded MRAM has passed multiple (five times) solder reflow tests, and exhibits extended data retention and endurance. It has “very comparable” read speed and much faster (order of magnitude) write speed (200 nanoseconds compared to 20 microseconds) than flash.

“Combined with the low-power back-biased SOI process and RF capabilities, GFs 22FDX platform makes for a highly differentiated IoT development technology,” Mason said, adding that “there is a critical industry pivot underway to new NVM memories and silicon on insulator technologies.”

Customers will be evaluating GF’s 22FDX process with MRAM for their next-generation IoT (MCU) designs to take advantage of these new technologies, he said.

“With eMRAM there are very few data retention concerns, unlike flash which has major problems there. We have a very extensive design win pipeline, with over 250 million dollars in design wins. We are getting ready for production, finalizing our qualification activities. Unlike other embedded MRAM solutions we designed it to be robust – we think that is key to adoption as a eFlash memory replacement and to ‘cross the chasm’ from early adoption to mainstream acceptance.”

“MRAM is going to happen, but right now it is crossing the chasm,” Coughlin said. When a new technology comes on to the market, “what generally happens is that we try a number of different markets to see where it will best work. That is what is happening now with MRAM. You start to build up your volumes and amortize costs. The whole game is getting the volumes up. The more costs come down the more it will be favorably seen,” he said.

About Author

Dave Lammers

Dave Lammers is a contributing writer for Solid State Technology and a contributing blogger for GF’s Foundry Files. Dave started writing about the semiconductor industry while working at the Associated Press Tokyo bureau in the early 1980s, a time of rapid growth for the industry. He joined E.E. Times in 1985, covering Japan, Korea, and Taiwan for the next 14 years while based in Tokyo. In 1998 Dave, his wife Mieko, and their four children moved to Austin to set up a Texas bureau for E.E. Times. A graduate of the University of Notre Dame, Dave received a master’s in journalism at the University of Missouri School of Journalism.