Radhika Arora, VP/GM Pluggables Silicon Photonics
Kyra Ledbetter, RF Product Manager
Arvind Narayanan, Director, SiGe Product Line

As cloud infrastructure scales and AI workloads accelerate, data centers face unprecedented demand to deliver dramatically higher bandwidth with greater energy efficiency. While compute performance rapidly advances, the system bottleneck has shifted to the optical interconnects and transceivers that link these systems together.

Achieving longer reach, higher bandwidth density and lower energy per bit now demands a fundamental shift in optical module architectures – and the technologies that enable them. 

Leadership at 200G/λ: GF’s Scalable Silicon Photonics and High-Performance SiGe Solutions 
Data centers are rapidly approaching the limits of electrical interconnects, making silicon photonics the only scalable path forward. Enabling higher per‑lambda (λ) data rates, optical I/Os and packaging‑aware integration, GF’s silicon photonics solutions are redefining how bandwidth scales in next‑generation scale‑up and scale‑out architectures. 

GF’s silicon photonics technologies deliver the reach, bandwidth density and energy efficiency required to support the industry’s transition to 200G/λ and beyond. Combined with qualified 300mm manufacturing and wafer-level test capabilities, GF delivers a scalable, flexible, production-ready platform designed to evolve with future data rates and advanced packaging architectures – with capabilities including: 

• 200G/λ PAM4 support, fundamental to enable scalable 1.6T transceivers 

• Multiple modulator options for high-speed transmitter architectures, including Mach-Zehnder, MicroRing and RAMZI 

• High speed photodetectors enabling advanced receiver performance 

• Integration of silicon nitride (SiN) waveguides and spot‑size converters for higher optical launch power, improved coupling efficiency and long‑term reliability 

• Support for both v-grooves and standard edge coupled fibers  

• Through-silicon via (TSV)‑based 2.5D/3D integration to shorten electrical paths, reduce power and enable near‑package and co‑packaged optics at 1.6T  

As a compliment, Silicon Germanium (SiGe) remains a critical enabler of high‑performance optical transceivers – powering the analog and mixed‑signal electronics that drive and receive optical signals.  

After enabling industry‑leading 100G/λ deployments with our SiGe8XP technology, GF is positioned to lead the transition to 200G/λ with its added high-performance SiGe solutions – including 9HP+. GF’s SiGe 9HP+ platform sets a new benchmark in HBT performance, delivering ft/fmax of 340/410 GHz alongside one of the industry’s most complete BiCMOS offerings. Its combination of high‑speed HBTs, advanced CMOS integration, low‑loss metallization and high‑voltage LDMOS has made it the technology of choice for today’s highest‑performance optical transceivers. Beyond raw transistor speed, SiGe 9HP+ enables critical system‑level advantages: 

• Higher integration density for compact, thermally efficient designs 

• A robust portfolio of precision passives, including metal resistors, MIM capacitors and transmission lines 

• Industry‑leading PDK infrastructure and device models that accelerate design closure and reduce design iterations 

Together, these capabilities enable designers to meet the stringent power, bandwidth and aggressive form-factor requirements of the 200G/λ generation.  

A Unified Path from Optics to Electronics: Co-integration of Silicon Photonics and SiGe  
GF uniquely enables co‑integration of silicon photonics and SiGe, delivering a streamlined, end-to-end solution spanning optics, electrical ICs and advanced packaging. This comprehensive approach reduces system complexity, improves scalability and empowers customers to harness the strengths of both technologies – unlocking the speed, power efficiency and integration required to overcome today’s architectural stopgaps. 

Paving the Way to 400G/λ with Next-Generation Photonics and Advanced SiGe BiCMOS  
Enabling 400G/λ and beyond requires advancing beyond traditional modulator limits. As it is recognized that silicon alone will face increasing challenges beyond 200G/λ, GF continues to push the boundaries of silicon while also exploring novel materials. This includes a strategy centered around the hybrid and heterogenous integration of high Pockels effect materials – such as thin‑film lithium niobate (TFLN), barium titanate (BTO) and advanced electro‑optic polymers – directly onto our silicon photonics platform to enable ultra‑high bandwidth (>100 GHz) operation at lower drive voltage. 

GF has also introduced CBIC, the industry’s first SiGe Complementary BiCMOS platform, to support the leap to 400G/λ. By combining high‑speed SiGe HBTs with a flexible CMOS integration, CBIC enables new power‑efficient transceiver architectures optimized for extreme bandwidth demands – with key advantages including: 

• Industry‑leading NPN with ft/fmax > 400GHz, delivering enhanced analog performance 

• Support for innovative amplifier topologies that deliver high gain‑bandwidth with significantly reduced power consumption 

• A modular approach that allows customers to tailor cost, performance and integration for specific optical module classes 

Looking Ahead: Enabling the Future of Optical Systems 
As optical data rates advance toward multi‑terabit architectures, innovation across silicon photonics, SiGe and advanced packaging becomes increasingly critical. To empower this, GF’s roadmap focuses on continued HBT performance scaling and advanced 3D integration to enable tighter co-packaging of optical and electrical components.  

With a proven foundation and a clear roadmap, GF is committed to spearheading the evolution of optical connectivity technologies that will define the next decade of cloud and AI infrastructure. 

Interested in learning more? Connect with GF’s silicon photonics and SiGe experts at OFC and visit us at booth #817 to explore how we’re enabling the next generation of optical connectivity. 

How GlobalFoundries and MIPS enables “sense–think–act–communicate” architectures for radar, SATCOM, and electromagnetic advantage. 

Ashish Shah, Deputy Director, Aerospace and Defense, GlobalFoundries
Eric Schulte, Sales Director, MIPS

Defense RF platforms are evolving from “sense-and-stream” architectures to “sense–think–act–communicate” Physical AI architectures where inference and control occur as close to the antenna as possible to shorten decision loops and improve performance in contested environments. This shift is driven by rapidly increasing spectrum and waveform complexity, paired with strict size, weight, power and cost (SWaP‑C) constraints, and the growing need for trusted microelectronics in sensitive defense applications.

In practical terms, operators need RF systems that can adapt to dense spectral occupancy, interference, jamming/spoofing, multipath and complex multi-function sensor operations without relying on high latency backhaul to centralized compute. As spectrum becomes more crowded, and decisions more real time, defense systems must redesign RF architectures to achieve in-theatre electromagnetic advantage with closed-loop, edge-resident intelligence.

Physical AI is not a software add-on with associated high overhead. It is a real-time workload within the RF signal chain driving performance upgrades to RF fidelity, compute, power/thermal design and mission assurance from silicon through deployment.

What changes with Physical AI in RF systems (systems view)

Traditional RF architectures often capture, digitize and stream data to downstream processing, resulting in limited ability to respond quickly to dynamic threats or changing propagation conditions. Physical AI changes this paradigm by placing decision-making in the loop, enabling the RF system to sense–think–act–communicate.

For radar, SATCOM/communications and electromagnetic advantage, this Physical AI approach translates into energy efficient functions such as adaptive waveform selection, beam/mode scheduling, interference recognition/avoidance, emitter classification and spectral triage happening closer to the sensor—reducing latency and bandwidth demand while improving resilience.

Three system-level challenges to address

1) RF fidelity (wide spectral bandwidth + dense interference)

Physical AI implementations in RF applications are only as good as the signals they receive. If the RF front end saturates, distorts, or loses linearity in the presence of blockers, downstream feature extraction and inference can be compromised. System architects should continue to improve linearity, isolation and predictable RF behavior as they look to implement Physical AI.

Example outcomes:

• Radar: higher signal-to-noise ratio improves AI-assisted clutter/interference handling and classification.
• SATCOM/Comms: stable front-end behavior improves interference avoidance and link adaptation decisions.
• Signal Intelligence: high isolation protects feature extraction for real-time classification and geolocation under co-site emitters.

2) SWaP‑C + thermal headroom for in-loop inference and control

Implementing intelligence at this level adds compute and memory requirements near the RF sensor. Many defense platforms have tight power, thermal and size constraints while requiring deterministic timing. Embedded processors enable event-driven “compute bursts” (infer when needed, return to low-power monitoring when idle) and provide predictable control paths to keep the sensing loop stable while staying within constraints.

3) Uninterrupted supply of uncompromised microelectronics

Readiness and deterrence require assured access to microelectronics components that are securely designed, manufactured and tested, with robust protections for confidentiality and integrity and verifiable provenance traceability. Thwarting the adversary also demands less vulnerable microelectronics that integrate more of the digital and RF functions. For adaptive systems, primes also need a credible path for secure updates (firmware and models) via secure communications. GF technologies support both CMOS and high-performance RF circuit integration to design advanced signal processing functions with high performance RF signal chains.

GF and MIPS enable embedded Physical AI

Physical AI success depends on more than inference throughput. It requires deterministic closed-loop control inside the RF chain. MIPS embedded cores best serve as that decision and control anchor that turns RF observations into timely actions, supporting local classification, policy selection and real-time modification of the RF signal chain. Integrated using GF technologies, this approach can reduce integration and adversary compromise risk (fewer off chip interfaces), improve timing predictability and support qualification paths that require trusted manufacturing options.

MIPS anchors its value proposition with targeted solutions aligned to customer-specific workloads. This enables defense integrators to tune microarchitecture and real-time features to the exact sensing, classification and control loops required by mission profiles while simultaneously optimizing power and performance. By nature of the RISC-V instruction set architecture (ISA) being an open standard, customers can perform independent verification of the privilege models and security extensions while also avoiding vendor lock-in or any opaque microarchitectural behaviors. Additionally, the open standard of RISC-V enables tailored ISA extensions, hardware roots of trust and domain-specific cryptographic accelerators. Mission capability is advanced, and integration risks are mitigated by using MIPS Atlas Explorer virtual platform for digital engineering with software-first development. This digital twin of the CPU core provides early workload validation and pre-silicon performance modeling necessary for shortening development and qualification timelines. The entire Atlas portfolio from MIPS is purpose-built for Physical AI workloads by combining deterministic control, scalable compute and security primitives to support the next generation of RF systems.

Building the right RF-to-AI architecture from the start

If you are developing AI-assisted RF capabilities for radar, SATCOM/communications, or signal intelligence, GlobalFoundries can help map system requirements to the right combination of RF platform, help you architect embedded MIPS Physical AI cores and trusted secure supply options—accelerating from architecture definition to fielding tested qualified microelectronics while reducing system integration risk. Engage GF (MIPS) early to align on the embedded processor subsystem choices for deterministic Physical AI at the RF edge.

As Physical AI moves from concept to deployment, intelligence must be distributed across machines at the edge, in real time and under strict power, latency, safety and cost constraints. 

To prepare for the Physical AI era to take off, GF acquired MIPS, a leading provider of AI and embedded processor IP, software and tools. We sat down with Sameer Wasson, CEO of MIPS, to discuss how the combined strengths of MIPS’ architecture, IP and design with GF’s differentiated process technologies gives customers a differentiated path to Physical AI: deterministic, safety-capable compute running at the edge, unlocking the next wave of real machines that sense, think, act and communicate in real time – and how GF’s purpose-built platforms enable it at scale. 

Why was bringing MIPS into GF the right strategic move to help address the Physical AI market? 

AI is at an inflection point and customers need real-time, deterministic intelligence that interacts with the physical world safely and reliably – what we call Physical AI. MIPS brings a 40-year heritage of efficient, scalable compute for performance critical systems, now centered on RISC-V application processors and real-time subsystems designed for low latency, functional safety and power efficiency. Pairing that with GF’s differentiated process technologies and global manufacturing gives customers something unique: a platform that spans IP, custom silicon and volume production so they can get to working silicon faster and tailor it to real-world edge AI. 

From powering the Nintendo 64 released in 1996, to Mobileye’s most advanced driver-assistance chips EyeQ6 with over 200 million ADAS SoCs shipped, and even serving as the foundation for leading cloud hyperscalers’ infrastructure, we have a track record to deliver workload focused performance at scale. 

GF’s decision to acquire MIPS last year was about coming together to create a more flexible, differentiated offering for customers by pairing GF’s leading process technology and manufacturing scale with MIPS’ processor IP and software enablement. That was the rationale that sat at the core of the decision, with a shared goal to help our customers get to working silicon faster and tailor that silicon to real-world edge AI needs. The timing couldn’t align better with the surge in AI demand across transportation, communications & datacenter infrastructure, robotics and intelligent edge markets.  

How does intelligence show up in each stage of Physical AI workloads for customers? 

Physical AI takes the capabilities of AI models from the data center and deploys it at the edge. The foundation of Physical AI is what I like to call the S.T.A.C., the closed-loop workload that enables platforms to Sense, Think, Act, Communicate and empowers edge platforms to be intelligent, without sacrificing latency, safety, privacy or efficiency. Each stage has distinct compute and system requirements, and the most successful platforms co-optimize them rather than over-build any single part. 

For Sense, the system collects real-time data from sensors like cameras, LiDAR, radar and analog inputs, to understand its surroundings. It must efficiently fuse and prioritize these different data types while staying within tight power limits. 

In the Think stage, the system quickly interprets sensor data and makes decisions using on-device AI and control algorithms. This requires high-performance, low latency compute that delivers deterministic results within strict power budgets—especially for robots and vehicles operating at the edge. 

In the Act stage, the system converts decisions into physical movements by controlling motors, actuators, brakes or robotic limbs. This stage demands ultra-low latency and highly reliable responses so actions like braking or obstacle avoidance happen within milliseconds. 

The Communicate stage is where the system shares information internally and externally—between subsystems, other devices, the cloud or even humans. This requires secure, low latency connectivity and support for multiple communication standards (such as Bluetooth® LE or 5G) without introducing delays. 

In essence, there’s intelligence of different kinds in every stage, from algorithms to better enact precise movement, to advanced multi-modal perception processing. Each customer’s workload will be a little different inside the S.T.A.C. loop, making flexibility key to successfully enabling Physical AI at the edge—without breaking power, latency or safety budgets.  

Where does MIPS differentiate across the S.T.A.C. loop?  

MIPS differs in two key areas; one is our software-first co-design approach. We start by profiling the customers’ workload, running their stack on our virtual platforms and core simulators to expose bottlenecks early. Then we shape the silicon around that from custom instructions to memory subsystem tweaks, so the shipped SoC meets real-world KPIs on day one. Our Atlas Explorer virtual platform is a good example of this “shift-left” approach. 

The second is our deep, workload-specific hardware optimization on open RISC-V.  Because our IP is modular, we can tailor cores and subsystems. MIPS has spent years pioneering multi-threading and functional safety capabilities in our processor IP to deliver event-driven, deterministic real-time performance and functional safety.  

At the end of the day, we enable our customers to run their workloads on our core models to get insights into platform design ahead of silicon. This helps our customers align their workload and IP selection for the right stages of the workload they are trying to address. The open and modular nature of RISC-V enables us to deliver targeted workload enhancements at the hardware level, down to the core, unlocking deep levels of efficiency and performance.  

You’ve talked about MIPS’ software-first approach. What does that look like in practice?  

It means we start by understanding and profiling the customer’s software workload before finalizing the hardware. By first understanding the software workload, we can deliver insights into optimizations to help with software/hardware co-design. By doing this, we can identify bottlenecks or specific functions that consume a lot of cycles and then optimize our IP to handle those efficiently. For example, if an autonomous drone’s navigation software is taxing the CPU, we might introduce a custom instruction or tweak the memory subsystem to accelerate it. This co-design process creates a tight feedback loop between software and hardware. As the demand for high-performance, domain specific compute accelerates, the ability to analyze and optimize interactions between workloads and customizable compute platforms becomes a true competitive advantage.  

A software-first approach closes the gap between hardware and software teams, enabling smarter architectural decisions and establishing a scalable, low risk workflow for building Physical AI platforms aligned with real-world performance targets. 

In other words, by the time chips are fabricated, customer software is already running smoothly on the silicon. This engagement model ultimately accelerates time to market because we’ve done all the tuning upfront. It also reduces risk in production cycles and empowers deeper partnerships—we work hand-in-hand with customers, which means we’re not just a vendor, we’re a collaborator in their product development. Ultimately, a software-first mindset leads to a scalable, low-risk workflow for building Physical AI platforms: you get the performance you need with fewer surprises, and you hit your performance targets much more reliably. 

How would you describe the value proposition from the combined GF + MIPS portfolio?  

It’s platform leverage. The requirements of new physical AI products converge around the GF and MIPS portfolio; a need for ultra-low power platforms that operate reliably in harsh conditions, operate safety and securely and are imbued with intelligence; and delivered with supply chain resilience. Together, we address the critical needs of next-generation Physical AI products by bridging advanced silicon technology with intelligent processor design. 

GF’s ultra-low power technologies, including its FDX and FinFET platforms, enables full system integration and reduces power leakage with adaptive body-biasing, to stay within the tight power envelopes of Physical AI applications require. GF’s embedded memory, RF integration and advanced packing also empower us to build dense, efficient SoCs that Physical AI depends on for real-time responsiveness and power efficiency in deployed systems.  

With this synergy of our portfolios, we can now help customers:  

• Achieve the lowest power and highest integration in the industry  

• Meet the latency, power and cost constraints for edge devices  

• Accelerate time to market and drive their supply chain resilience  

As the CEO of MIPS, what about GF drew you in to joining forces with their team?    

For me, it’s always been about how we can unlock the most value for our customers. When I considered what we could achieve together in the face of the rapidly emerging Physical AI market, it was a no-brainer. With the acquisition, we’ve created a more complete customer engagement model that allows us to support customers at multiple levels including IP, custom silicon and software.  

Very few companies can bring that full stack to the table. If a standard, off-the-shelf chip doesn’t cut it for a customer’s needs, now we’ll build one that does and manufacture it for them. That level of partnership is what drew me in. 

Beyond building leading technology platforms, GF’s resilient manufacturing footprint spanning the globe means we can scale our efforts and position ourselves to lead in high-growth areas like autonomous driving, smart devices and industrial automation. This geographic reach and manufacturing excellence stood out to me as a key benefit for our customers.  

Final question for you, Sameer. What are you most looking forward to as we see Physical AI evolve?  

Honestly, what excites me most is seeing our technology come to life in the real world. The humanoid robots, the next wave of autonomous driving features—those are no longer science fiction.  Autonomous vehicle features that are currently in production have already surpassed what many once thought was possible at this point in time. Plus, given the speed at which we’re seeing Physical AI evolve, I think we’re about to see entirely new applications emerge over the next few years that aren’t even on the radar yet. For example, we might soon have robots in hospitals performing routine procedures, or agile delivery drones navigating complex environments seamlessly. I’m especially excited for those “firsts” – the first time someone’s life is saved by an AI-driven vehicle’s split-second decision, or the first household robot that truly understands and interacts with its environment in a human-like way. Those will be milestone moments.   

I look forward to the day when devices powered by our full-stack solutions are out there in the world making a difference – whether it’s in a car avoiding an accident or a robot in a warehouse making operations safer and more efficient. Seeing our work enable new levels of autonomy and intelligence in everyday machines – that’s the reward. And given how fast this field is moving, I suspect we won’t have to wait long to witness some amazing breakthroughs. 

As the aerospace and defense community gathers at the GOMACTech Conference next week, industry leaders will focus on non-negotiables in the industry including assured access; trusted supply for uncompromised integrity and confidentiality; and modernization activities to innovate national defense systems. However, none of that progress is sustainable without manufacturing that is secure, scalable and built for long program lifecycles. 

At GlobalFoundries, we’re committed to meeting these needs through domestic semiconductor manufacturing across our Trusted accredited facilities in Malta, New York and Burlington, Vermont. As a long-standing supplier to the U.S. A&D ecosystem, our onshore footprint plays an essential role in strengthening resilient semiconductor capabilities, leveraging scale for commercial and industrial markets, and specializing for the aerospace and defense market. 

That’s why we’ve been accelerating the transfer, ramp and launch of key process technologies in the U.S. to deliver enhanced security and strengthen domestic supply for applications ranging from secure communications and radar to SATCOM, signal processing and power systems. 

FDX™ and FinFET: Efficient compute for secure, connected defense systems 

In GF’s Malta fab in New York, FDX production is ramping up after first being announced in our collaboration with NXP. This platform brings fully-depleted SOI benefits to systems that must deliver strong performance within tight thermal and power budgets.  

For defense modernization, our FDX technology supports secure communications and networking by enabling power-efficient compute and control closer to the edge, advances edge autonomy through low-latency processing for sensor fusion and real-time decision-making and enables signal-chain integration by bringing mixed workloads together alongside RF-adjacent subsystems. From SATCOM front-end modules to smart sensors, FDX is building the next generation of connected and secure solutions critical to the A&D industry. 

Another important high-performance, energy-efficient compute platform manufactured in New York is our FinFET technology. As the industry’s most complete 1X FinFET platform, this technology offers a winning combination of processing performance, secure connectivity, power efficiency, reliability and radiation hardness in a customizable, compact design backed by over a decade of manufacturing expertise. Customers like BAE Systems utilize GF’s technology for advanced avionics and telecommunications applications that can withstand the harsh environment of space. 

Feature-rich, energy-efficiency at scale 

Defense systems are increasingly distributed across sensors, radios, trackers and microcontrollers operating at the edges – often in environments where battery life, temperature and reliability define what’s possible. GF’s ultra-low power 40nm platform is designed for exactly these kinds of needs with ultra-low standby leakage, high endurance and integrated analog features. 

First announced last October, GF is bringing our 40nm ultra-low power technology to New York – a critical step forward for A&D customers planning next-generation low-power connectivity and control solutions back by resilient U.S. manufacturing. 

12S0 is another critical technology manufactured through our New York site that A&D customers like BAE Systems trust and have flight-proven for radiation-hardened by design solutions for sensitive space applications. A highly-customizable platform with power efficiency and area benefits and supported by a robust design ecosystem partner, 12S0 provides the flexibility and reliability needed for efficient and scalable electronic systems. 

45RFSOI & 45RFE: RF performance for SATCOM front-ends and beamformers 

Modern defense communications rely on spectrum agility, beam steering and high-efficiency RF front ends, particularly as SATCOM architectures evolve and phased arrays proliferate across air, land, sea and space. That’s why GF produces 45RFSOI and 45RFE in Malta, New York to support RF front-end and beamforming requirements. 

45RFSOI is designed for very high-frequency wireless systems, including advanced radar and 5G/6G mmWave applications, while 45RFE enables handset and battery-operated devices with lower leakage and an enhanced PA device. These platforms help A&D customers integrate more RF functionality in compact form factors without compromising performance. 

CBIC: GF’s highest-performing SiGe to date 

GF’s CBIC complimentary Bi-CMOS silicon germanium platform is the highest performing SiGe platform to date, targeting high-performance, high-speed communications. With full production ramp in Vermont slated for this year, the CBIC platform will expand trusted domestic access for applications where RF performance and consistency are critical, including SATCOM and advanced radar applications. 

In practice, that performance translates into tangible system benefits. For example, in low-noise amplifiers the technology design allows for ultra-low noise figure at reduced current consumption. In advanced radar systems, CBIC technology enables high-resolution sensing and distance ranging in a reduced form factor, supporting more capable sensing architectures where space, weight and power are tightly constrained. 

Power GaN: Advancing U.S.-manufactured power for next-gen platforms  

Power is a strategic differentiator in defense, impacting endurance, payload capacity, thermal design and system reliability. As gallium nitride (GaN) becomes a key enabler for higher energy efficiency, greater power density and compactness in power systems, GF has expanded its power roadmap by entering into a technology licensing agreement with TSMC for 650V and 80V GaN. 

By pairing proven GaN technology with GF’s focus on robust manufacturing, we’re advancing power solutions designed for harsh operating environments and addressing critical gaps for mission-critical platforms that can’t afford performance tradeoffs. 

Why GF’s technology leadership is central to trusted A&D manufacturing 

Trusted manufacturing is strongest when it’s backed by a thriving ecosystem that brings together innovative process technologies, committed customers and long-term partnerships that reinforce scale and longevity. This combination validates that U.S.-based production can deliver leading capability while also meeting the security and assurance expectations that aerospace and defense programs require. 

As demand for trusted U.S. manufacturing accelerates, GF remains aligned with national security priorities by strengthening domestic semiconductor resilience and long-term defense readiness, today and into the future.