In our journey at Fab 8, we’ve made great strides. Last year, we crossed a significant milestone – moving from construction to full-scale production, and driving to ramp the early-access version of our 14nm FinFET technology (14LPE) to volume production.

This year we have driven a steady march of execution with our performance-enhanced 14LPP technology. We kicked off the year with the exciting news that our 14nm technologies will be fueling some of the most powerful compute and graphics applications, with AMD’s new lineup of discrete graphic processors.

Continuing this momentum, we delivered strong technical results by reaching mature yields in high volume production on multiple products, introducing several new products for major customers—including complex chips with very large die—and achieving a 100 percent track record of yielding first-time-right silicon and aggressively ramping production to support product launches.

It is our relentless focus on execution that is now allowing our customers to differentiate their products, and to bring them to market on time. Another great example is the latest news from AMD, who recently gave a performance preview of its next-generation “Zen” processor core. Just like AMD’s newly launched Polaris graphics chips, this processor is built on GLOBALFOUNDRIES’ 14LPP process technology. It is the powerful combination of AMD’s design expertise and GF’s 14nm FinFET technology that allows Zen to deliver a landmark increase in processor performance over previous generations.

I am pleased to report that customer traction remains strong across a number of segments, with more than 20 active engagements in the mobility, consumer electronics, and high-performance computing sectors. And the interest is not just from traditional foundry customers, but also from companies that are looking to take advantage of the capabilities provided by our FX-14™ ASIC offering for cloud networking, wireless base station, compute, and storage applications.

Looking ahead, we are committed to delivering leading-edge technology platforms, while enhancing our 14nm FinFET technology, to enable new opportunities and secure a strong foundation for future success, including 7nm next generation technology.

By Dave Lammers

Packaging has emerged as one of the semiconductor industry’s most potent forms of innovation. As classical (geometric) scaling has become more difficult, various “equivalent scaling” innovations have stepped up to the plate, notably 193nm immersion lithography, strained silicon, high-k/metal gate, finFETs, fully depleted SOI, and vertical NAND.

Now it is packaging’s turn, and that puts the spotlight on experts such as Dave McCann, the vice president of packaging research and development at GLOBALFOUNDRIES.

In an interview at his office in Malta, N.Y., McCann said more customers are turning to packaging innovations. “In all application spaces, customers are, more than ever before, integrating multiple chips in one package to address scaling limitations,” he said.

For high-bandwidth applications such as servers and networking, McCann said GF is the only foundry to have 32nm TSVs in high-volume production.

GF and Micron Technology have worked together on Hybrid Memory Cube (HMC) products, with GF creating the TSV-enabled logic layer which is stacked with Micron’s DRAM chips.

“We are getting a lot of customer requests for 2.5D design, which take advantage of our experience in ASICs plus memory and high-speed Serdes. Most of these are on silicon interposers, on which we create high density traces to interconnect the ASIC and memory, so that customers achieve very high bandwidth products.” 

RF and IoT innovations are also driven by multi-chip applications, utilizing chips from different GF fabs and nodes. This enables use of chips at the most cost efficient node rather than forcing integration and suboptimum costs, he added.

One intriguing R&D thrust for some RF and IoT applications is to use glass substrates, instead of silicon, which can be too lossy. “We believe we can create very dense interconnects, and get rid of all of the passives, using through-glass vias. Products could become much thinner,” McCann said. Photonics is another important area. The goal is to bring photonic signals directly to the module, instead of stopping at the board or backplane.

For upper-end mobile and other markets, McCann said “wafer-level fan out is a terrific technology first for enabling more IO. Later we will see it used also for integrating multiple chips, starting with the memory and apps processor.” High density fan-out applications will cost more than the low cost substrate-based packages they will replace, however.

Thin glass and FO-WLP allow multiple chips to be placed very close together, providing for a much smaller footprint, thinner profile, and higher performance. The profile is thinner because the laminate substrate is eliminated. And McCann noted these technologies are “particularly interesting for RF and IoT, because of the low loss for high frequency signals.”

“The lowest cost WLFO supply chain will utilize OSATs for what they do best. We do not want to do what an OSAT can do just as well, or better. Especially in the mainstream technology areas, OSATs can offer their solutions to many customers, more cheaply than we could internally,” McCann said. He added that this gives customers the flexibility to use the supply chain they want to use.

“The combination of GF with IBM’s Microelectronics division brings new opportunities, including high-density stacking applications. Being the only Foundry with HVM experience on high-density 3D TSV in logic, we bring credibility to the marketplace,” McCann said. In addition to TSV’s in 3D, GF designs and develops 2.5D silicon interposer products in-house for volume manufacturing at OSATs, “providing the best combination of design skills with a low-cost production path.”

“GF is also working on low-cost alternative memory technologies that will scale with new silicon nodes at no added layer cost and technologies for use in multiple product technologies,” McCann said. GF portfolio scales across both 2.5D as well as 3D packaging solutions

Industry analysts said they are keeping a close eye on the foundry’s packaging skills.

Dick James, senior fellow at ChipWorks (Ottawa) said GF has an opportunity to further leverage the through-silicon via and interposer technology developed within IBM Microelectronics over the last decade. James noted that the recently released executive summary of the International Technology Roadmap for Semiconductors (ITRS) emphasized the need to integrate heterogeneous ICs in system-in-package solutions. Putting together high-bandwidth memory with graphics processors is a particularly important area going forward, James said, one that will take advantage of the interposer experience at the GF Fishkill, N.Y. fab. McCann added that this also will build on GF’s expertise in large thin die stacking.

Jan Vardaman, president of the Austin, Texas-based packaging consultancy TechSearch International, said her firm is seeing increased uses of silicon interposers for high performance applications. “The use of a silicon interposer allows the use of a heat spreader on the top to help remove heat,” she noted.

The use of wafer-level fanout packaging is also bringing a lot of infrastructure changes, Vardaman said, starting with IC/package co-design.

Thus far, most application processors had been using a laminate substrate with flip chip interconnects. “With fan out WLP there is no need for a traditional laminate substrate with underfill. There are just a lot of infrastructure changes. All packaging can take place at the foundry, or at an OSAT which has a non-traditional OSAT assembly line,” Vardaman said.

TechSearch is seeing a rapid adoption of FO-WLP beyond its widespread use in baseband processors, to RF transceivers and switches, power management integrated circuits (PMICs), automotive radar modules, near field communications (NFC), audio CODECs, security devices, and microcontrollers.

GF collaborative supply chain model for 2D, 2.5D and 3D interconnect

It’s no wonder, then, that customers are beating a path to Dave McCann’s office. McCann said “the number of customer engagements is multiplying,” attracted by the mix of OSAT partners and internally developed technologies.

“GF does not ever plan to be an OSAT. But where the OSAT is not investing, where we can develop unique capabilities internally and gain a differentiating advantage, then we will partner with an OSAT to ramp that solution into production,” McCann said.

Lately, there’s been a lot of buzz about silicon photonics in the data center industry. What’s it all about? The ever-expanding digital universe is being driven by cloud computing, mobile data, video streaming, and Internet-of-Things (IoT). Today, it’s estimated that by end of 2016, more than 6 zettabytes (i.e., the equivalent to about 250 billion DVDs) of data will be pushed through data centers and this number is expected to double by 2020. Moreover, networking bandwidth is doubling every two to three years, meaning that the number of links and each link data capacity is doubling – 10G is becoming 25G, and 40G ports are evolving to 100G ports. Moving all of this data within data centers (between the servers, switches, and storage) will require the widespread adoption of optical communications in order to scale with the growth in storage and computing demands. Using copper wires and fiber-optic technology to transmit the digital information will not keep pace with Moore’s Law.

For a long time the photonics industry has been working on hybrid silicon technologies such as indium phosphide and silicon germanium. Fast forward to today: traditional CMOS fabs have been able to successfully manufacture Photonics IC and optical components without special processing steps and additional associated costs. Laser technology has also evolved different fiber technologies (SMF and MMF), supporting multiple wavelengths operating at 1550 and 1310 modes.

For data centers, this helped create momentum for longer-reach, fiber-based connections to overcome copper’s limitation of 100 meters. The optical connections address the up to 2km reach within data centers and up to 80km outside data centers. Finally, technology analysts are projecting huge growth for SiPh-based modules, lasers, and fiber deployments, with two big markets driving the momentum: Datacom and Telecom, which are creating new markets in Data Center Interconnect (DCI), Metro Area, Content Delivery Network (CDN), and Basestation Front haul markets. Thanks to the hyper-growth in cloud data center traffic and the transition to 400G in the optical transport network, cloud data center giants are claiming that they will consume three-fourths of the optics in the entire world by next year. That means SiPh-based 100G ports will be ramping to multi-millions per year starting in 2017.

Additionally, growth in the number of servers deployed has skyrocketed to more than 12M per year, and connectivity from rack-to-rack, rack-to- switches, and switch-to-switch are morphing to fiber-based connectivity in order to meet the networking bandwidth for power hungry data centers with lower total cost of ownership (TCO).

This makes me eagerly optimistic about on-board optics, PSM4, QSFP56, and CFP4 type modules and form factors.kets driving the momentum; Datacom and Telecom, which are creating new markets in Data Center Interconnect (DCI), Metro Area, Content Delivery Network (CDN), and Basestation Front haul markets. Advancements in SiPh technology are essential for data center speed. A recent Cisco VNI update estimates that traffic between DCI to DCI is equal to the 1/7th of the traffic inside data center. What that mean is DCI to DCI and Metro links will be screaming for the bandwidth and dense connectivity of 100G links in the near future. For all the obvious reasons, SiPh chips are the right choice to lower the cost and power consumption, while improving bandwidth and capacity. Remarkably, Metro and CDN networks will become key enablers for advancing silicon photonics technology.

Source: Cisco Global Cloud Index: 2014–2019

Content providers, network operators, and content delivery networks are seeing tremendous growth fueled by video streaming and overall broadband access and backhaul networks. This insatiable bandwidth need is driving video streaming networks to move to multi-100G based SiPh solutions. Especially in the long-haul, transport networks will see the need for multi-100G line rates, 400G, and up to 1.2Tera bits transponders and muxponders line cards. A few optical companies have started demonstrating 200G based solutions in this area, creating a great opportunity for optical component vendors, module manufacturers, and silicon photonic chip manufacturers. The growth ladder for silicon photonics is coming from the new 5th generation, 5G technology for cellular systems. The real question is: why is 5G driving silicon photonics’ inflection point? Wireless infrastructure pundits are claiming 5G is a panacea technology and it will support 10G/s bandwidth, 1000x capacity at lowest round trip latency ~1ms, in comparison with LTE technology. Top infrastructure vendors like Ericsson, Nokia and Huawei are vigorously looking for new architectures to fulfill the 5G dream with bandwidth requirements at the lowest TCO. Some key trends are large-scale array antenna and mm-wave communication with many remote radio heads (RRH) deployed in the field (small cells again!). In the front haul, all these remote radio heads are connected to a centralized radio access network (CRAN), referred to as the super basestation (should I say virtualized?). Since these basestations are isolated from each other, with kilometers of distance, they require a high speed, and reliable connectivity networking. This is where the need for OTN based Silicon Photonics connectivity comes in, when 5G basestations deployment ramps, infrastructure growth will explodes and China alone will have millions of ports and volumes with Silicon Photonics. But in reality, 5G deployments are bit far away, meaning they will probably not begin until 2018 and beyond (and more likely 2020+). But clearly 5G front haul architectures will propel the demand for various silicon photonics modules and chip sets. The progressive growth of the hyper-connected world is pushing photonics to an inflection point. Now, it’s not if but when? Starting with cloud data centers, DCI-to-DCI, Metro and long-haul transport networks, and 5G basestations will enable the momentum and drive the demand for silicon photonics based solutions and deployments ports. As we approach 2017, we should see an inflection point for data center OEMs and telecom operators. Ultimately, all that demand for high speed, high bandwidth data in telecommunications and data centers will propel ecosystem growth and silicon photonics technologies.. To learn more about hypercloud data center solutions with breakthrough semiconductor technologies, download this recent presentation or contact your GLOBALFOUNDRIES sales representative.

By Ian Williams

More and more cars today offer In-Vehicle-Infotainment (IVI) systems typically embedded in the rear-seat or dashboard. These integrated systems deliver entertainment, multimedia, and driver information in a single platform, which usually has three delivery formats; docking for smartphone integration, a fully enclosed platform tightly linked to vehicle development, and aftermarket to address vehicle upgrades. This growing phenomenon can create product life-cycle revenue streams as well as a path to remain engaged with customers over time. Nowadays, car buyers factor more than just a vehicle’s driving performance into their buying decision. With the growing dependence we all place on our smartphones, and how they keep us connected to the rest of the world, seamless integration of mobile devices into an automobile plays an important and influential role in how we evaluate new cars. Non-traditional automotive suppliers like Apple and Google clearly see the connected car as a huge opportunity. Early signs of their increasing interest and participation in this market are evident by Apple CarPlay and Android Auto standards that enable IVI systems to act as displays and controllers for iOS and Android enabled smartphones. While cars are much more than smartphones on wheels, having all of our favorite smartphone functions and apps available to us while driving is a compelling value proposition. In automotive IVI systems semiconductor IPs such as USB, DDR/LPDDR, MIPI-D PHY, WiFi and Bluetooth are most suitable for integration with high-performance CPU and GPU cores to deliver the required system audio, video, and driver information functionality. There is also an increasing requirement to have all of these blocks integrated into a single chip. In addition to IVI systems, Advanced Driver Assistance Systems (ADAS) are another fast growing automotive application. Designers of SoCs for ADAS applications require a combination of high-performance and power-efficient IP functions in order to deliver a complete solution. Here multimedia interfaces like HDMI will enable high-definition displays, and interface connectivity can be offered via IPs that supports PCIe and SATA protocols. According to a new report published by Allied Market Research, global IVI market is expected to reach $33.8 billion by 2022. The future growth of this segment will be fueled by new technology and growing demand from new markets for more sophisticated IVI systems in lower priced vehicles. For example, in the chart below, are a few key emerging trends for vehicle connectivity that could influence future architecture of IVI systems.

Even though there are automotive industry alliances such as the GENIVI Alliance, a non-profit organization committed to driving the broad adoption of an IVI open-source development platform, a key driver for automakers is still product differentiation for both software and hardware. Not only in the infotainment sector, but also the Human Machine Interface (HMI) functionality such as WiFi connectivity, text-to-speech, 3D graphics, and voice and gesture recognition will also be major drivers of product differentiation. HMI requires modular, scalable system solutions that must be taken into consideration as early as the systems semiconductor specification stage. Additionally, IVI systems will become another platform for content availability and consumption. Customers will expect to have seamless access to content from their IVI platform. For vehicle manufacturers this is critically important as they search for solutions that will lower costs and complexity, while at the same time the need to innovate and integrate new technologies will continue to gain ground for in-vehicle systems. Along with mounting complexity, automotive manufacturers are also faced with compressed time-to-market cycles, reduced from 5 to 2 years, coupled with the pressure for mid-life-cycle platform refresh options. For an automaker, having an ASIC development partner capable of providing increased levels of integration with higher levels of functionality, while at the same time driving down production costs is a major asset. An automotive supplier must be able to deliver a product that can withstand the rigors of the automotive industry qualification standards such as AEC-Q100 and ISO/TS 16949. AEC-Q100 is a failure mechanism-based stress test qualification requirement for packaged ICs destined for automotive applications and most automobile manufacturers will require compliance even for in-cabin applications. Partnering with GLOBALFOUNDRIES, the leading automotive foundry who’s been supplying automotive grade wafers for more than 10 years provides designers with the confidence of automotive qualification expertise. The ability to deliver all of this emerging functionality into a compact form factor drives the need for increased ASIC integration in future IVI systems. Moving forward, there is also the potential for ADAS and IVI systems to merge as improved display technologies and capabilities focus on reducing driver visual distraction, pushing the need to have related content integrated onto the same screen including the capability for voice and gesture recognition. More frequently, to keep up with the constant pace of change in automotive IVI system functionality, designers traditionally look to suppliers who have access to an extensive library of automotive IC design IP, the capability to execute, the flexibility to offer cost-effective solutions, and the ability to meet the stringent automotive industry quality requirements. But the key differentiator moving forward will be the ability to achieve fast development cycles. INVECAS was formed to offer semiconductor IPs, Design Realization and Silicon Realization services exclusively for customers developing products based on GF’s process technologies. The way INVECAS adds the most value to our automotive customers is to help them with their ASIC needs. Being able to integrate their ASIC requirements and deliver an automotive qualified production part is how we move from vendor to partner. This is why partnering with INVECAS and GF on your next automotive project is important to help drive down the cost of various electronic modules and subsystems.

When I sat down next to a yield engineer at lunch during a recent semiconductor manufacturing conference, we started talking. He said he worked at the Malta fab of GLOBALFOUNDRIES but had spent most of his career at IBM’s Fishkill fab, coming over last July 1 when GF formally acquired IBM Microelectronics. I asked him about the transition, whether the IBMers – especially those with some years at IBM — had felt anxieties about moving into a new organization.

“Actually, it was the opposite,” he replied quickly. “At IBM there was a feeling that semiconductor manufacturing was no longer central to the organization’s key purpose. That went on for some time. So when we moved to GF, it was like ‘now we know what we are doing.’ We were finally in an organization where making semiconductors is the main purpose.” Some of the top managers in New York and Vermont express similar sentiments about a transition process that involved 5,000 people and two fabs.

Geoff Akiki now runs the mask organization at GF’s Burlington, Vt. site, but earlier he was an Integration Executive tasked with bringing IBM Microelectronics into the GF fold. The integration team created a simple color code: Red for people within IBM Microelectronics, Orange for GF people, and Blue for those who would remain with IBM, largely to manage the foundry relationship with GF. “There was some trepidation, by both IBMers and GF people. Some of the GF people wondered how this would affect their roles in the expanded organization. For the most part, the Red people were hugely excited, because they felt that GF was doing chip manufacturing for a living and had strategies that were better than what they had seen for 10 years.” If GF brought resources and focus, IBM brought world-class engineers, an ASIC business, and radio frequency (RF) technologies, based on both RF-SOI and SiGe processes, a valuable asset in this era of mobility. Tom Caulfield, general manager of Fab 8 in Malta, N.Y., said about 600 people came to Malta after the formal integration date of July 1, 2015. However, prior to that a fairly large number of engineers had left IBM, seeing the handwriting on the wall, to apply for positions at GF. When Caulfield took on his current job in 2014, he hired what he calls “A players” from various companies, including Intel and Samsung, and large numbers of experienced IBMers. “At IBM, microelectronics was seen as a cost center, a means to an end, but not The Business. These guys were chomping at the bit to go where making semiconductors is the real game.” Bringing 5,000 people – about 3,000 from the Burlington fab and another 2,000 who worked at Fishkill, N.Y. – into GF was a large task. To prepare, Akiki said the integration team created 14 work streams, and organized meetings where as many as 200 people would participate. Two key decisions eased the transition process. The most important was that there would be essentially no layoffs. GF CEO Sanjay Jha had laid down a philosophy of ‘disturb as little as possible’ during the integration. Bringing essentially everyone over from IBM reduced anxiety levels considerably, Akiki said. Secondly, GF decided to acquire the two IBM manufacturing sites (and the facilities support staff) at Burlington and Fishkill in their entirety, obviating any need to partition the properties. (IBM kept the packaging technology center in Bromont, Canada).

IP Integration

At the recent 2016 Design Automation Conference (DAC) in Austin, one speaker noted that when Company A acquires Company B, typically the first to be laid off are the EDA engineers at Company B. With them goes the historical knowledge of what intellectual property (IP) is owned by Company B, and how those IP cores can be used by the design teams.

Akiki said from the outset intellectual property was seen as “a large part of the value” of the IBM integration deal. “We bragged about the number of patents we picked up. But we knew that IP often languishes, and we set a specific objective to integrate both the people and the IP files.” A major effort went into making sure that all of the IP had been categorized, so that GF could “eventually declare we have received the key deliverables.” Gary Patton became the chief technology officer at GF as part of the integration, and it is probably fair to say that his technology development organization has benefited the most from the deal. One consequence of Malta being a “green field” site, Caulfield noted, is that it takes time to build up the talent. That was especially true in technology development (TD), with Patton adding that maintaining a TD schedule “has been a key knock” in the past.

For the 10/7nm development program, Patton said more than 50 percent of the people are from IBM, adding that the 10/7nm development team draws on experience from the 14nm team. Caulfield emphasized that Malta has benefited from the “added scale” of ASIC business that came to GF as part of the IBM deal. IBM engineers had developed high-performance ASIC cores, such as a 56 gigabit/s Serdes core, that Caulfield said are not available from other foundries. “We are refreshing our ASICs platform at 14nm, and I can tell you that I entertain about one new customer at week at this site, with at least half of them being ASIC customers.” I asked about the challenges which remain, a year after the initial integration. The most important challenge is to further knit together the two human organizations, making sure that the people with two or three decades of service during their careers at IBM share their knowledge with the engineers at Malta, and vice versa. As Caulfield said, “Our job is to get more intermixing going on, to get more balance. We don’t want to bring in all of these great technologists and then not leverage their skills.” Patton, who earlier managed IBM’s Semiconductor Research and Development Center (SRDC), promises to take advantage of the talent he now manages at GF. “In the 10 years I led the SRDC, I can tell you we always had more performance than Intel. The industry has been heavily focused on mobile, and now customers are not happy with the performance improvements they are seeing from our competitors, compared with 16nm. They are looking for more performance. And guess what? We just brought in a specialty team here at GF that knows how to do performance.”